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 Results 1 - 9 of 9  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
MW 2014-05-23
Kyoto Doshisha Univ. A Low-Spurious E-Band GaAs MMIC Frequency Converter for Over-Gbps Wireless Communication
Yasuhiro Morita, Shuya Kishimoto, Masaharu Ito, Keiichi Motoi, Kazuaki Kunihiro (NEC) MW2014-41
A highly integrated, low-spurious E-band MMIC frequency converter, which comprises a sub-harmonic mixer with an LO multi... [more] MW2014-41
VLD, IPSJ-SLDM 2008-05-09
Hyogo Kobe Univ. A Dependable SRAM with high-reliability mode and high-speed mode.
Shunsuke Okumura, Hidehiro Fujiwara, Yusuke Iguchi, Hiroki Noguchi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.)
We propose a novel dependable SRAM with 7T memory cell pair, and introduce a new concept, “quality of a bit (QoB)” for i... [more] VLD2008-12
ICD, SDM 2007-08-24
Hokkaido Kitami Institute of Technology An Area-Conscious Low-Voltage-Oriented 8T-SRAM Design under DVS Environment
Yasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Yusuke Iguchi (Kobe Univ.), Koji Nii (Kobe Univ./Renesas Technology), Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) SDM2007-167 ICD2007-95
This paper demonstrates that an 8T memory cell can be alternative design to a 6T cell in a future highly-integrated SRAM... [more] SDM2007-167 ICD2007-95
ICD, ITE-IST 2007-07-26
Hyogo   A 10T Non-Precharge Two-Port SRAM for 74% Power Reduction in Video Processing
Shunsuke Okumura, Hiroki Noguchi, Yusuke Iguchi, Hidehiro Fujiwara, Yasuhiro Morita (Kobe Univ.), Koji Nii (Kobe Univ./Renesas Technology), Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2007-53
We propose a low-power non-precharge-type two-port SRAM for video processing. The proposed memory cell (MC) has ten tran... [more] ICD2007-53
ICD 2007-04-12
Oita   A Novel Two-Port SRAM for Low Bitline Power Using Majority Logic and Data-Bit Reordering
Hidehiro Fujiwara, Koji Nii, Hiroki Noguchi, Junichi Miyakoshi, Yuichiro Murachi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2007-7
 [more] ICD2007-7
ICD, SDM 2006-08-18
Hokkaido Hokkaido University A Vth-Variation-Tolerant SRAM with 0.3-V Minimum Operation Voltage for Memory-Rich SoC under DVS Environment
Hiroki Noguchi (Kobe Univ.), Yasuhiro Morita (Kanazawa Univ.), Hidehiro Fujiwara, Kentaro Kawakami, Junichi Miyakoshi (Kobe Univ.), Shinji Mikami (Kanazawa Univ.), Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.)
 [more] SDM2006-152 ICD2006-106
MSS, CAS 2005-11-10
Yamaguchi Yamaguchi University A Vertical Partitioning Algorithm for the Secret Sharing Distributed Database Management System
Toshiyuki Miyamoto, Yasuhiro Morita, Sadatoshi Kumagai (Osaka Univ.)
Because the amount of data treated by a database system increases,
the necessity of distributed database management sy... [more]
CAS2005-52 CST2005-21
MSS 2005-01-27
Tokyo Univ. of Electro-Communications Distributed DataBase System using Secret Sharing Sheme
Yasuhiro Morita, Toshiyuki Miyamoto, Sadatoshi Kumagai (Osaka Univ)
 [more] CST2004-47
IE, SIP, ICD, IPSJ-SLDM 2004-10-21
Yamagata   Power-Minimum Frequency/Voltage Cooperative Management Method in Sub-decimicron Era
Kentaro Kawakami, Miwako Kanamori, Yasuhiro Morita, Jun Takemura, Masayuki Miyama (Kanazawa Univ.), Masahiko Yoshimoto (Kobe Univ.)
To achieve both of a high peak performance and low average power characteristics, frequency-voltage cooperative control ... [more] SIP2004-82 ICD2004-114 IE2004-58
 Results 1 - 9 of 9  /   
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