Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
RCS |
2018-04-23 10:20 |
Yamaguchi |
Hotel New Tanaka, Yuda Onsen |
A reserch on RTS/CTS performance of IEEE802.11ah Satoya Yoshida, Tran Thi Hong, Yasuhiko Nakashima (NAIST) RCS2018-3 |
To reduce power consumption of IEEE802.11ah,We investigated the relationship between the RTS/CTS and power consumption.
... [more] |
RCS2018-3 pp.13-17 |
CPSY, IPSJ-ARC |
2016-10-06 10:00 |
Chiba |
Makuhari-messe |
CPSY2016-47 |
We study a low-complex physical layer of IEEE 802.11ah, a new Wi-Fi standard for IoT (Internet of Things) application.
... [more] |
CPSY2016-47 pp.25-26 |
NS, RCS (Joint) |
2015-12-18 11:25 |
Ehime |
Matsuyama Community Center |
BER/PER Simulation on Fractional bit width and Circuit Design of FFT for IEEE802.11ah Soichiro Kanagawa (NAIST), Nguyen Dang Hai (DUT), Hong Thi Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) RCS2015-258 |
In recent years, the concept of IoT has attracted attention. It utilize the data obtained by connecting the things to th... [more] |
RCS2015-258 pp.87-92 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 11:40 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Performance Comparison of FPGA Accelerators with Vivado HLS and PyCoRAM Yuma Kikutani (OPUCT), Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-66 |
High-level synthesis (HLS) technology has been an attractive and efficient method for FPGA system development. In this ... [more] |
CPSY2015-66 pp.27-32 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 12:05 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
A proposal of the light field image compression and decompression using HEVC Takamasa Mitani, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-67 |
A light field image is a type of images that can refocus and extend the depth of field by post processing. A light field... [more] |
CPSY2015-67 pp.33-38 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 14:35 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Performance Evaluation of K-best Viterbi Decoder for IoT Applications Thi Hong Tran (NAIST), Dwi Rahma Ariyani, Lina Alfaridah ZH (Andalas Univ.), Shinya Takamaeda-Yamazaki, Yasuhiko Nakashima (NAIST) CPSY2015-70 |
[more] |
CPSY2015-70 pp.51-56 |
CPSY, IPSJ-ARC |
2015-10-08 10:00 |
Chiba |
Makuhari-messe |
[Poster Presentation]
A System Employing OculusRift and Many-core Simulator for Visualizing Performance Bottlenecks Satoshi Shimaya, Hiromasa Kato, Tomoya Kameda, Keisuke Fujimoto, Shohei Takeuchi, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-46 |
According to the complicated internal structure of modern CPU, the cost for tuning software to get higher performance ha... [more] |
CPSY2015-46 pp.5-6 |
CPSY, IPSJ-ARC |
2015-10-08 10:00 |
Chiba |
Makuhari-messe |
[Poster Presentation]
Evaluation of a Low Power CGRA EMAX Embedded with Zynq Shohei Takeuchi, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-51 |
We have been proposing EMAX (Energy-Aware Multimode Accelerator
Extension) that is one of CGRAs and can employ maximum ... [more] |
CPSY2015-51 pp.39-41 |
SIS, IPSJ-AVM |
2015-09-03 15:00 |
Osaka |
Kansai Univ. |
Performance Evaluation of 802.11a Viterbi Decoder for IoT Applications Hiromasa Kato, Tran Thi Hong, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) SIS2015-22 |
This research is our first step on the purpose of developing low-complex Viterbi decoder for IoT applications. We evalua... [more] |
SIS2015-22 pp.43-49 |
CPSY, DC, IPSJ-ARC (Joint) [detail] |
2015-08-04 10:00 |
Oita |
B-Con Plaza (Beppu) |
Design Space Exploration of Computational Photography Accelerator Yuttakon Yuttakonkit, Tran Thi Hong, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-17 |
Computational photography applications use image processing to extract quality improvement or addi- tional features. Ins... [more] |
CPSY2015-17 pp.7-12 |
CPSY, DC, IPSJ-ARC (Joint) [detail] |
2015-08-04 13:30 |
Oita |
B-Con Plaza (Beppu) |
Implementation and Evaluation of Near Memory Processing Architecture on FPGA Tadahiro Edamoto, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-18 |
[more] |
CPSY2015-18 pp.41-45 |
CPSY, DC, IPSJ-ARC (Joint) [detail] |
2015-08-04 14:00 |
Oita |
B-Con Plaza (Beppu) |
Evaluation of ARM-EMAX tightly coupled accelerator on Zynq Shohei Takeuchi, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-19 |
We focus on the data reusability of stencil computations on a previously proposed memory-network based accelerator, name... [more] |
CPSY2015-19 pp.47-52 |
RECONF |
2015-06-20 09:55 |
Kyoto |
Kyoto University |
A Near-memory Processing Architecture on FPGAs for Data Movement Intensive Applications Vu Hoang Gia, Tran Thi Hong, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) RECONF2015-15 |
Memory latency is the most serious design concern in computing centric architectures integrated with cache levels as a d... [more] |
RECONF2015-15 pp.79-84 |
DC, CPSY |
2015-04-17 13:00 |
Tokyo |
|
CGRA in Cache for Graph Applications Shohei Takeuchi, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-7 DC2015-7 |
Recently, CGRA has been suggested high-speed and lower power consumption of graph processing. Generally, CGRA is connect... [more] |
CPSY2015-7 DC2015-7 pp.37-41 |
DC, CPSY |
2015-04-17 13:50 |
Tokyo |
|
Near Memory Processing Architecture for High Performance Atypical Applications Tadahiro Edamoto, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-9 DC2015-9 |
[more] |
CPSY2015-9 DC2015-9 pp.49-52 |
DC, CPSY |
2015-04-17 17:05 |
Tokyo |
|
Prototyping of GPS-based Item Finder System Soichiro Kanagawa, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-15 DC2015-15 |
In recent years, small high-performance equipment accumulating a large amount of information has been penetrated as poss... [more] |
CPSY2015-15 DC2015-15 pp.83-88 |