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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| IE, MVE, CQ, IMQ (Joint) [detail] |
2024-03-13 16:20 |
Okinawa | Okinawa Sangyo Shien Center (Primary: On-site, Secondary: Online) |
Detection and Evaluation of Road Damage Potholes Using Monocular Depth Estimation Yoshinori Kumagai, Tomoya Fujii, Rie Jinki, Yuukou Horita (Univ. of Toyama)  IMQ2023-34 IE2023-89 MVE2023-63 |
[more] | IMQ2023-34 IE2023-89 MVE2023-63 pp.120-125 |
| IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] | 2018-01-18 10:05 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | An Implementation of a Binarized Deep learning Neural Network on an FPGA using the Intel OpenCL Takumu Uyama, Tomoya Fujii, Haruyoshi Yonekawa, Shimpei Sato, Hiroki Nakahara (Titech) VLD2017-64 CPSY2017-108 RECONF2017-52 |
[more] | VLD2017-64 CPSY2017-108 RECONF2017-52 pp.13-18 |
| RECONF | 2017-09-25 14:20 |
Tokyo | DWANGO Co., Ltd. | A Memory Reduction with Neuron Pruning for a Binarized Deep Convolutional Neural Network: Its FPGA Realization Tomoya Fujii, Shimpei Sato, Hiroki Nakahara (Tokyo Inst. of Tech.) RECONF2017-26 |
For a pre-trained deep convolutional neural network (CNN) for an embedded system, a high-speed and a low power consumpt... [more] |
RECONF2017-26 pp.25-30 |
| RECONF | 2017-09-26 10:00 |
Tokyo | DWANGO Co., Ltd. | GUINNESS: A GUI based Binarized Deep Neural Network Framework for an FPGA Hiroki Nakahara, Haruyoshi Yonekawa, Tomoya Fujii, Masayuki Shimoda, Shimpei Sato (Tokyo Inst. of Tech.) RECONF2017-31 |
[more] | RECONF2017-31 pp.51-56 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2017-07-27 15:45 |
Akita | Akita Atorion-Building (Akita) | Consideration of All Binarized Convolutional Neural Network Masayuki Shimoda, Tomoya Fujii, Haruyoshi Yonekawa, Shimpei Sato, Hiroki Nakahara (Tokyo Inst. of Tech.) CPSY2017-28 |
A pre-trained convolutional neural network (CNN) is a feed-forward computation perspective, which is widely used for the... [more] | CPSY2017-28 pp.131-136 |
| CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] | 2017-01-24 15:50 |
Kanagawa | Hiyoshi Campus, Keio Univ. | A Memory Reduction with Neuron Pruning for a Convolutional Neural Network: Its FPGA Realization Tomoya Fujii, Simpei Sato, Hiroki Nakahara (Tokyo Tech), Masato Motomura (Hokkaido univ.) VLD2016-79 CPSY2016-115 RECONF2016-60 |
For a pre-trained deep convolutional neural network (CNN) aim at an embedded system, a high-speed and a low power consum... [more] | VLD2016-79 CPSY2016-115 RECONF2016-60 pp.55-60 |
| RECONF | 2016-09-06 13:00 |
Toyama | Univ. of Toyama | A Memory-based Accelerator for a Random Forest Classification using Altera SDK for OpenCL Hiroki Nakahara, Akira Jinguji, Tomoya Fujii, Shinpei Sato (TITECH), Naoya Maruyama (RIKEN) RECONF2016-36 |
[more] | RECONF2016-36 pp.57-62 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2016-08-09 16:15 |
Nagano | Kissei-Bunka-Hall (Matsumoto) | An Acceleration of a Random Forest Classification using Altera SDK for OpenCL Hiroki Nakahara, Akira Jinguji, Tomoya Fujii, Shinpei Sato (TITECH), Naoya Maruyama (RIKEN) CPSY2016-25 |
[more] | CPSY2016-25 pp.175-180 |
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