Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SDM |
2021-11-11 16:15 |
Online |
Online |
A threshold voltage definition based on a standardized charge vs. voltage relationship Kiyoshi Takeuchi, Tomoko Mizutani, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto (Univ. Tokyo) SDM2021-58 |
Threshold voltage defined by a band bending of twice the substrate intrinsic-to-Fermi level difference has been widely a... [more] |
SDM2021-58 pp.29-32 |
SDM, ICD, ITE-IST [detail] |
2019-08-08 10:00 |
Hokkaido |
Hokkaido Univ., Graduate School /Faculty of Information Science and |
Application of Extreme Value Theory to Statistical Analyses of Worst Case SRAM Data Retention Voltage Tomoko Mizutani, Kiyoshi Takeuchi, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto (Univ. of Tokyo) SDM2019-41 ICD2019-6 |
The extreme value theory was applied to the estimation of the maximum SRAM data retention voltage (DRV). It was found th... [more] |
SDM2019-41 ICD2019-6 pp.27-30 |
SDM, ICD, ITE-IST [detail] |
2018-08-08 09:45 |
Hokkaido |
Hokkaido Univ., Graduate School of IST M Bldg., M151 |
Understanding Temperature Effect on Subthreshold Slope Variability in Bulk and SOTB MOSFETs Shuang Gao, Tomoko Mizutani, Kiyoshi Takeuchi, Masaharu Kobayashi, Toshiro Hiramoto (Univ. Tokyo) SDM2018-37 ICD2018-24 |
We present a new finding that subthreshold slope (SS) variability is reduced at high temperature in both bulk and silico... [more] |
SDM2018-37 ICD2018-24 pp.65-70 |
SDM, ICD, ITE-IST [detail] |
2018-08-09 13:45 |
Hokkaido |
Hokkaido Univ., Graduate School of IST M Bldg., M151 |
Effect of multiple stress application in post-fabrication cell stability self-improvement in SRAM cell array Tomoko Mizutani, Kiyoshi Takeuchi, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto (Univ. of Tokyo) SDM2018-49 ICD2018-36 |
A new version applying multiple stress of the post fabrication SRAM self-improvement technique, which improves SRAM cell... [more] |
SDM2018-49 ICD2018-36 pp.121-126 |
SDM, ICD, ITE-IST [detail] |
2017-08-01 09:45 |
Hokkaido |
Hokkaido-Univ. Multimedia Education Bldg. |
Parallel Programming of Non-volatile Power-up States of SRAM Tomoko Mizutani, Kiyoshi Takeuchi, Takuya Saraya (Univ. of Tokyo), Hirofumi Shinohara (Waseda Univ.), Masaharu Kobayashi, Toshiro Hiramoto (Univ. of Tokyo) SDM2017-38 ICD2017-26 |
A technique for using an ordinary SRAM array for programmable and readable non-volatile (NV) memory is proposed. Paralle... [more] |
SDM2017-38 ICD2017-26 pp.49-54 |
SDM |
2016-10-26 15:30 |
Miyagi |
Niche, Tohoku Univ. |
[Invited Talk]
Back-Bias Control Technique for Suppression of Die-to-Die Delay Variability of SOTB CMOS Circuits at Ultralow-Voltage (0.4 V) Operation Hideki Makiyama, Yoshiki Yamamoto, Takumi Hasegawa, Shinobu Okanishi, Keiichi Maekawa, Hiroki Shinkawata, Shiro Kamohara, Yasuo Yamaguchi (Renesas Electronics Corp.), Nobuyuki Sugii (Hitach), Koichiro Ishibashi (The Univ. of Electro-Communications), Tomoko Mizutani, Toshiro Hiramoto (The Univ. of Tokyo) SDM2016-71 |
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] |
SDM2016-71 pp.15-20 |
SDM |
2016-10-26 16:10 |
Miyagi |
Niche, Tohoku Univ. |
[Invited Talk]
Ultralow-Voltage Operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM Down to 0.37 V Utilizing Adaptive Back Bias Yoshiki Yamamoto, Hideki Makiyama, Takumi Hasegawa, Shinobu Okanishi, Keiichi Maekawa, Shinkawata Hiroki, Shiro Kamohara, Yasuo Yamaguchi (Renesas), Nobuyuki Sugii (Hitachi), Tomoko Mizutani, Toshiro Hiramoro (UT) SDM2016-72 |
We demonstrated record 0.37V minimum operation voltage (VMIN) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks... [more] |
SDM2016-72 pp.21-25 |
ICD, SDM, ITE-IST [detail] |
2016-08-03 15:05 |
Osaka |
Central Electric Club |
Increased Drain-Induced Variability and Within-Device Variability in Extremely Narrow Silicon Nanowire MOSFETs with Width down to 2nm Tomoko Mizutani, Kiyoshi Takeuchi, Ryota Suzuki, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto (Univ. of Tokyo) SDM2016-67 ICD2016-35 |
The effects of drain voltage in threshold voltage variability in extremely narrow silicon nanowire (NW) channel FETs are... [more] |
SDM2016-67 ICD2016-35 pp.123-126 |
SDM, ICD |
2015-08-25 10:55 |
Kumamoto |
Kumamoto City |
[Invited Talk]
Novel Single p+Poly-Si/Hf/SiON Gate Stack Technology on Silicon-on-Thin-Buried-Oxide (SOTB) for Ultra-Low Leakage Applications Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (Renesas Electronics Corp.), Nobuyuki Sugii (Hitachi), Tomoko Mizutani, Masaharu Kobayashi, Toshiro Hiramoto (UT) SDM2015-67 ICD2015-36 |
We demonstrate a cost effective 65-nm SOTB CMOS technology for ultra-low leakage applications. Novel single p+poly-Si/Hf... [more] |
SDM2015-67 ICD2015-36 pp.53-57 |
SDM, ICD |
2015-08-25 11:45 |
Kumamoto |
Kumamoto City |
Threshold Voltage and Current Variability of Extremely Narrow Silicon Nanowire MOSFETs with Width down to 2nm Tomoko Mizutani, Yuma Tanahashi, Ryota Suzuki, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto (Univ. of Tokyo) SDM2015-68 ICD2015-37 |
[more] |
SDM2015-68 ICD2015-37 pp.59-62 |
SDM |
2014-10-17 14:30 |
Miyagi |
Niche, Tohoku Univ. |
[Invited Talk]
Back-Bias Control technique for Suppression of Die-to-Die Delay Variability of SOTB MOS Circuits at Ultralow-Voltage (0.4 V) Operation Hideki Makiyama, Yoshiki Yamamoto, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii, Yasuo Yamaguchi (LEAP), Koichiro Ishibashi (Univ. of Electro-Communications), Tomoko Mizutani, Toshiro Hiramoto (Univ. of Tokyo) SDM2014-94 |
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] |
SDM2014-94 pp.61-68 |
ICD, SDM |
2014-08-05 09:00 |
Hokkaido |
Hokkaido Univ., Multimedia Education Bldg. |
[Invited Talk]
Ultra-Low Voltage (0.1V) Operation of Threshold Voltage Self-Adjusting MOSFET and SRAM Cell Toshiro Hiramoto, Akitsugu Ueda, Seung-Min Jung, Tomoko Mizutani, Takuya Saraya (Univ. of Tokyo) SDM2014-71 ICD2014-40 |
A new Vth self-adjusting MOSFET operating at 0.1V is proposed, where Vth automatically decreases at on-state and increas... [more] |
SDM2014-71 ICD2014-40 pp.51-54 |
ICD, SDM |
2014-08-05 09:50 |
Hokkaido |
Hokkaido Univ., Multimedia Education Bldg. |
Statistical Analysis of Minimum Operation Voltage (Vmin) in Fully Depleted Silicon-on-Thin-BOX (SOTB) SRAM Cells Tomoko Mizutani (Univ. of Tokyo), Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii (LEAP), Toshiro Hiramoto (Univ. of Tokyo) SDM2014-72 ICD2014-41 |
The minimum operation voltage (Vmin) of fully depleted (FD) silicon-on-thin-BOX (SOTB) SRAM cells are measured and stati... [more] |
SDM2014-72 ICD2014-41 pp.55-58 |
ICD |
2014-04-18 09:55 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Lecture]
Ultralow-Voltage Operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM Down to 0.37 V Utilizing Adaptive Back Bias Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii, Yasuo Yamaguchi (LEAP), Tomoko Mizutani, Toshiro Hiramoto (UTokyo) ICD2014-11 |
We demonstrated record 0.37V minimum operation voltage (VMIN) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks... [more] |
ICD2014-11 pp.53-57 |
SDM |
2014-01-29 13:55 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Analysis of Transistor Characteristics in Distribution Tails beyond ±5.4σ of 11 Billion Transistors Tomoko Mizutani, Anil Kumar, Toshiro Hiramoto (Univ. of Tokyo) SDM2013-142 |
Transistors in distribution tails of 11G (11 billion) transistors were intensively measured and compared with transistor... [more] |
SDM2013-142 pp.31-34 |
SDM |
2014-01-29 14:40 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Suppression of Die-to-Die Delay Variability of Silicon on Thin Buried Oxide (SOTB) CMOS Circuits by Balanced P/N Drivability Control with Back-Bias for Ultralow-Voltage (0.4 V) Operation Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Koichiro Ishibashi (Univ. of Electro- Comm.), Tomoko Mizutani, Toshiro Hiramoto (Univ. of Tokyo), Yasuo Yamaguchi (LEAP) SDM2013-143 |
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] |
SDM2013-143 pp.35-38 |
SDM, ICD |
2013-08-02 09:25 |
Ishikawa |
Kanazawa University |
Reduced Cell Current Variability in Fully Depleted Silicon-on-Thin-BOX (SOTB) SRAM Cells at Supply Voltage of 0.4V Tomoko Mizutani (Univ. of Tokyo), Yoshiki Yamamoto, Hideki Makiyama, Hirofumi Shinohara, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Toshiro Hiramoto (Univ. of Tokyo) SDM2013-75 ICD2013-57 |
Cell current (ICELL) variability in 6T-SRAM composed of silicon-on-thin-BOX (SOTB) MOSFETs by 65nm technology is measure... [more] |
SDM2013-75 ICD2013-57 pp.47-52 |
ICD, SDM |
2012-08-02 13:00 |
Hokkaido |
Sapporo Center for Gender Equality, Sapporo, Hokkaido |
[Invited Lecture]
Silicon on Thin Buried Oxide (SOTB) Technology for Ultralow-Power (ULP) Applications Nobuyuki Sugii, Toshiaki Iwamatsu, Yoshiki Yamamoto, Hideki Makiyama, Takaaki Tsunomura, Hirofumi Shinohara, Hideki Aono, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (LEAP/Renesas), Tomoko Mizutani, Toshiro Hiramoto (IIS, The University of Tokyo) SDM2012-68 ICD2012-36 |
Needs for low-power CMOS devices are still increasing. Ultralow-voltage-operation (ULV) CMOS with maximum power efficien... [more] |
SDM2012-68 ICD2012-36 pp.29-32 |
ICD, SDM |
2012-08-02 13:25 |
Hokkaido |
Sapporo Center for Gender Equality, Sapporo, Hokkaido |
Reduced Drain Current Variability in Fully Depleted Silicon-on-Thin-BOX (SOTB) MOSFETs Tomoko Mizutani (Univ. of Tokyo), Yoshiki Yamamoto, Hideki Makiyama, Takaaki Tsunomura, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Toshiro Hiramoto (Univ. of Tokyo) SDM2012-69 ICD2012-37 |
Drain current variability in silicon-on-thin-BOX (SOTB) MOSFETs by 65nm technology is analyzed and compared with convent... [more] |
SDM2012-69 ICD2012-37 pp.33-36 |
SDM, ED (Workshop) |
2012-06-29 09:45 |
Okinawa |
Okinawa Seinen-kaikan |
[Invited Talk]
Silicon on Thin Buried Oxide (SOTB) Technology for Ultralow-Power (ULP) Applications Nobuyuki Sugii, Toshiaki Iwamatsu, Yoshiki Yamamoto, Hideki Makiyama, Takaaki Tsunomura, Hirofumi Shinohara, Hideki Aono, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (LEAP/Renesas), Tomoko Mizutani, Toshiro Hiramoto (IIS, Univ. of Tokyo) |
Needs for low-power CMOS devices are still increasing. Ultralow-voltage-operation CMOS with maximum power efficiency can... [more] |
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