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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 17 of 17  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2021-02-05
16:40
Online Online [Invited Talk] Bumpless Build Cube (BBCube) using Wafer-on-Wafer (WOW) Technology with 3D Redundancy Scheme
Shinji Sugatani, Norio Chujo, Koji Sakui, Hiroyuki Ryoson, Tomoji Nakamura, Takayuki Ohba (Titech) SDM2020-61
An application of vertically replaceable memory block architecture
scheme hereinafter referred to as “3D redundancy” fo... [more]
SDM2020-61
pp.27-32
SDM 2016-01-22
10:40
Tokyo Sanjo Conference Hall, The University of Tokyo [Invited Talk] Re-think Stress migration phenomenon with Stress measurement in 12years
Hideya Matsuyama (Socionext), Takashi Suzuki, Tomoji Nakamura (FJ Lab), Motoki Shiozu, Hideo Ehara (MIFS) SDM2015-109
 [more] SDM2015-109
pp.5-8
SDM 2016-01-22
13:00
Tokyo Sanjo Conference Hall, The University of Tokyo [Invited Talk] characterization of nitride thin film deposited at low temperatures
Mayumi B. Takeyama, Masaru Sato (Kitami inst.), Yasushi Kobayashi, Yoshihiro Nakata, Tomoji Nakamura (Fujitsu Lab.), Atsushi Noya (Kitami inst.) SDM2015-112
 [more] SDM2015-112
pp.17-20
CPM 2015-11-06
14:55
Niigata Machinaka Campus Nagaoka Characterization of SiNx films deposited at room temperature
Masaru Sato, Mayumi B. Takeyama (Kitami Inst. of Technol.), Yasushi Kobayashi, Yoshihiro Nakata, Tomoji Nakamura (Fujitsu Lab.), Atsushi Noya (Kitami Inst. of Technol.) CPM2015-88
 [more] CPM2015-88
pp.23-26
CPM 2015-08-10
14:40
Aomori   Low temperature deposition of SiNx films as an insulating barrier
Mayumi B. Takeyama, Masaru Sato (Kitami Inst. of Technol.), Yasushi Kobayashi, Yoshihiro Nakata, Tomoji Nakamura (Fujitsu Lab.), Atsushi Noya (Kitami Inst. of Technol.) CPM2015-34
 [more] CPM2015-34
pp.15-18
CPM 2014-10-25
09:40
Nagano   Characterization of low-temperature deposited SiNx films applicable to 3D/2.5D-IC
Mayumi B. Takeyama, Masaru Sato (Kitami Inst. of Tech.), Yasushi Kobayashi, Yoshihiro Nakata, Tomoji Nakamura (FUJITSU LAB.LTD.), Atsushi Noya (Kitami Inst. of Tech.) CPM2014-115
3-dimensional stacked LSI and/or 2.5-D IC is attracted much attention to solve the issues how to develop the integration... [more] CPM2014-115
pp.53-56
SDM 2014-02-28
11:00
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Impact of Back Grind Damage on Si Wafer Thinning for 3D Integration
Yoriko Mizushima (Fujitsu Lab./Tokyo Inst. of Tech.), Youngsuk Kim (Tokyo Inst. of Tech./Disco), Tomoji Nakamura (Fujitsu Lab.), Ryuichi Sugie, Hideki Hashimoto (Toray Research Center), Akira Uedono (Univ. of Tsukuba), Takayuki Ohba (Tokyo Inst. of Tech.) SDM2013-167
Ultra-thin wafer is indispensable for bumpless 3D stacking. To know the thinning damage in detail, an atomic level defec... [more] SDM2013-167
pp.13-18
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-27
15:30
Kagoshima   [Invited Talk] Cu Wiring Technology for 3D/2.5D Packaging
Motoaki Tani, Yoshihiro Nakata, Tsuyoshi Kanki, Tomoji Nakamura (Fujitsu Lab.) VLD2013-75 CPM2013-119 ICD2013-96 CPSY2013-60 DC2013-41 RECONF2013-43
 [more] VLD2013-75 CPM2013-119 ICD2013-96 CPSY2013-60 DC2013-41 RECONF2013-43
pp.101-106(VLD), pp.63-68(CPM), pp.63-68(ICD), pp.9-14(CPSY), pp.101-106(DC), pp.21-26(RECONF)
CPM 2013-10-24
16:55
Niigata Niigata Univ. Satellite Campus TOKIMEITO Properties of SiNx films prepared by low process temperature
Mayumi B. Takeyama, Masaru Sato (Kitami Inst. of Tech.), Yoshihiro Nakata, Yasushi Kobayashi, Tomoji Nakamura (FUJITSU LAB.), Atsushi Noya (Kitami Inst. of Tech.) CPM2013-100
3-dimensional stacked LSI is attracted much attention to solve the issues how to develop the integration density and/or ... [more] CPM2013-100
pp.35-39
SDM 2013-02-04
13:50
Tokyo Kikai-Shinko-Kaikan Bldg. Nano-ordered Evaluation for Local Distribution of Adhesion Strength Between Cu/Dielectric in LSI Circuit
S.Kamiya, Hisashi Sato (Nagoya Inst. of Tech.), Masaki Omiya (Keio Univ.), Nobuyuki Shishido, Kozo Koiwa, Masahiro Nishida (Nagoya Inst. of Tech.), Tomoji Nakamura, Takashi Suzuki (Fujitsu Labs), Takeshi Nokuo, Toshiaki Suzuki (JEOL) SDM2012-153
One of serious problems for LSI is the weakness of interfaces in Cu/dielectric systems along with the trend of further m... [more] SDM2012-153
pp.15-20
SDM 2013-02-04
15:25
Tokyo Kikai-Shinko-Kaikan Bldg. High Reliability Technology of Fine Pitch Re-wiring for High Density Chip Package -- Cu Re-wiring Covering with Metal-Cap Barrier Technology --
Tsuyoshi Kanki, Junya Ikeda, Shoichi Suda, Yasushi Kobayashi, Yoshihiro Nakata, Tomoji Nakamura (Fujitsu Labs) SDM2012-155
In advancing minimization of Cu re-wiring for highly dense chip package at lower cost, the vital technology is to suppre... [more] SDM2012-155
pp.25-30
CPM 2012-08-09
09:50
Yamagata   Low temperature deposition of SiNx thin films by radical-assisted reaction
Mayumi B. Takeyama, Masaru Sato (Kitami Inst. Technol.), Yoshihiro Nakata, Yasushi Kobayashi, Tomoji Nakamura (Fujitsu Lab. Ltd.), Atsushi Noya (Kitami Inst. Technol.) CPM2012-45
3-dimensional stacked LSI is of high interest to overcome the issues how to develop the integration density and/or funct... [more] CPM2012-45
pp.51-54
SDM 2012-03-05
15:25
Tokyo Kikai-Shinko-Kaikan Bldg. Influence of Via Stress on Surface Micro-roughness-induced Leakage Current in Through-Silicon Via Interconnects
Hideki Kitada (Univ. of Tokyo/Fujitsu Lab.), Nobuhide Maeda, Koji Fujimoto, Shoichi Kodama, Young Suk Kim (Univ. of Tokyo), Yoriko Mizushima (Univ. of Tokyo/Fujitsu Lab.), Tomoji Nakamura (Fujitsu Lab.), Takayuki Ohba (Univ. of Tokyo) SDM2011-183
 [more] SDM2011-183
pp.41-46
SDM 2012-03-05
15:55
Tokyo Kikai-Shinko-Kaikan Bldg. Characterization of Local Strain around Through Silicon Via Interconnect in Wafer-on-wafer Structures
Osamu Nakatsuka (Nagoya Univ.), Hideki Kitada, Young Suk Kim (Univ. of Tokyo), Yoriko Mizushima, Tomoji Nakamura (Fujitsu Lab.), Takayuki Ohba (Univ. of Tokyo), Shigeaki Zaima (Nagoya Univ.) SDM2011-184
We have investigated the local strain structure in a thinned Si layer stacked on Si substrate for wafer-on-a-wafer appli... [more] SDM2011-184
pp.47-52
SDM 2011-02-07
15:25
Tokyo Kikai-Shinko-Kaikan Bldg. Development of Low Temperature Bump-less TSV Process in 3D Stacking Technology
Hideki Kitada, Nobuhide Maeda (The Univ. of Tokyo), Koji Fujimoto (Dai Nippon Printing), Yoriko Mizushima, Yoshihiro Nakata, Tomoji Nakamura (Fujitsu Laboratories Ltd.), Takayuki Ohba (The Univ. of Tokyo) SDM2010-224
Diffusion behavior of Cu in Cu through-silicon-vias (TSVs) fabricated using low-temperature plasma enhanced chemical vap... [more] SDM2010-224
pp.49-53
ICD, SDM 2010-08-27
10:15
Hokkaido Sapporo Center for Gender Equality [Invited Talk] Development of sub-10um Thinning Technology using Actual Device Wafers
Nobuhide Maeda, Kim Youngsuk (Univ. of Tokyo), Yukinobu Hikosaka, Takashi Eshita (FSL), Hideki Kitada, Koji Fujimoto (Univ. of Tokyo), Yoriko Mizushima (Fujitsu Labs.), Kousuke Suzuki (DNP), Tomoji Nakamura (Fujitsu Labs.), Akihito Kawai, Kazuhisa Arai (DISCO), Takayuki Ohba (Univ. of Tokyo) SDM2010-141 ICD2010-56
200-mm and 300-mm device wafers were successfully thinned down to less than 10-μm. A 200-nm non-crystalline layer remain... [more] SDM2010-141 ICD2010-56
pp.95-97
SDM 2007-12-14
13:50
Nara Nara Institute Science and Technology Observation of Dislocation Motion in Thin Si1-xGex Film by Light Scattering Method
Akito Hara (Tohoku Gakuin Univ.), Naoyoshi Tamura, Tomoji Nakamura (Fujitsu Lab. Ltd.) SDM2007-229
We succeeded in the observation of dislocation motion in a thin Si1-xGex film (thickness = 56 nm and x = 0.24) on a Si s... [more] SDM2007-229
pp.31-34
 Results 1 - 17 of 17  /   
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