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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD 2010-03-11
10:00
Okinawa   Study of Via Programmable Logic Device VPEX for wiring architecture and Logic Array Block
Shouta Yamada, Yuuichi Kokushou, Tomohiro Nishimoto, Naoyuki Yoshida, Ryohei Hori, Naoki Matsumoto, Tatsuya Kitamori (Ritsumeikan Univ.), Masaya Yoshikawa (Meijou Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2009-107
We have developed the via-programmable logic device VPEX which was optimized for EB direct writing, and also developed t... [more] VLD2009-107
pp.49-54
VLD 2010-03-11
10:25
Okinawa   Examination of the best basic logic gate architecture for Via programmable logic device
Ryohei Hori, Yuuichi Kokushou, Tomohiro Nishimoto, Shouta Yamada, Naoyuki Yoshida, Naoki Matsumoto, Takeshi Fujino (Ritsumei Univ.), Masaya Yoshikawa (Meijo Univ.) VLD2009-108
The structured ASIC on which the logic can be customized with a few mask layers, have been studied in order to reduce in... [more] VLD2009-108
pp.55-60
VLD 2010-03-11
10:50
Okinawa   Wiring delay of Logic Element used in Via programmable logic device VPEX
Tomohiro Nishimoto, Tatsuya Kitamori, Yuuichi Kokushou, Shouta Yamada (Ritsumeikan Univ), Masaya Yoshikawa (Meijou Univ), Takeshi Fujino (Ritsumeikan Univ) VLD2009-109
We have been studied the via-programmable-device VPEX (Via Programmable logic using EXclusive or array) whose logic elem... [more] VLD2009-109
pp.61-66
VLD 2009-03-12
09:15
Okinawa   Chip evaluation and implimentation of DES encryption using via-programmable-device VPEX
Masahide Kawarasaki, Tomohiro Nishimoto, Yuuichi Kokushou, Kazuma Kitamura, Shouta Yamada (Ritsumeikan Univ.), Masaya Yoshikawa (Meijyou Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2008-139
We have been studied the via-programmable-device VPEX (Via Programmable logic using EXclusive or array) whose logic elem... [more] VLD2008-139
pp.77-82
ICD 2008-12-12
13:45
Tokyo Tokyo Inst. Tech., Ohokayama Campus, Kokusa-Kouryu-Kaikan Improvement of Logic Element used in Via programmable logic device VPEX
Tomohiro Nishimoto, Masahide Kawarasaki, Eiji Hasegawa, Tomohiro Terakawa, Takeshi Fujino (Ritsumei Univ) ICD2008-122
We have been studied the via-programmable device (Via Programmable logic using EXclusive or array) whose logic element c... [more] ICD2008-122
pp.101-106
ICD 2008-12-12
14:10
Tokyo Tokyo Inst. Tech., Ohokayama Campus, Kokusa-Kouryu-Kaikan The Development of CAD Design Tools for Via Programmable Logic Device VPEX
Yuuichi Kokushou, Masahide Kawarasaki, Kouta Ishibashi, Tomohiro Nishimoto, Kazuma Kitamura (Ritsumeikan Univ), Masaya Yoshikawa (Meijyou Univ), Takeshi Fujino (Ritsumeikan Univ) ICD2008-123
We have been studied the user-programmable device called VPEX(Via Programmable logic using Exclusive or array) which can... [more] ICD2008-123
pp.107-112
 Results 1 - 6 of 6  /   
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