IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
... (for ESS/CS/ES/ISS)
Tech. Rep. Archives
... (for ES/CS)
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 3件中 1~3件目  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD 2018-04-20
Tokyo   [Invited Talk] Memory LSI using crystalline oxide semiconductor FET
Jun Koyama, Takako Seki, Yuto Yakubo, Satoru Ohshita, Kazuma Furutani, Takahiko Ishizu, Tomoaki Atsumi, Yoshinori Ando, Daisuke Matsubayashi, Kiyoshi Kato, Takashi Okuda (SEL), Masahiro Fujita (The Univ. of Tokyo), Shunpei Yamazaki (SEL) ICD2018-12
FETs fabricated with a c-axis aligned crystalline In-Ga-Zn oxide semiconductor (CAAC-IGZO) have an extremely low off-sta... [more] ICD2018-12
ICD 2015-04-17
Nagano   [Invited Talk] A 128kb 4bit/cell Nonvolatile Memory with Crystalline In-Ga-Zn Oxide FET Using Vt Cancel Write Method
Takanori Matsuzaki, Tatsuya Onuki, Shuhei Nagatsuka, Hiroki Inoue, Takahiko Ishizu, Yoshinori Ieda, Masayuki Sakakura, Tomoaki Atsumi, Yutaka Shionoiri, Kiyoshi Kato, Takashi Okuda, Yoshitaka Yamamoto (SEL), Masahiro Fujita (The Univ. of Tokyo), Jun Koyama, Shunpei Yamazaki (SEL) ICD2015-9
A 128kbit 4bit/cell memory is achieved by a nonvolatile oxide semiconductor RAM test chip with a c-axis aligned crystall... [more] ICD2015-9
ICD, SDM 2014-08-04
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] A 32-bit CPU with Zero Standby Power and 1.5-clock Backup/2.5-clock Restore Achieved by Utilizing a 180-nm Crystalline Oxide Semiconductor Transistor
Jun Koyama, Atsuo Isobe, Hikaru Tamura, Kiyoshi Kato, Takuro Ohmaru, Wataru Uesugi, Takahiko Ishizu, Kazuaki Ohshima, Yasutaka Suzuki, Naoaki Tsutsui, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi (SEL), Masahiro Fujita (Univ. of Tokyo), Shunpei Yamazaki (SEL) SDM2014-70 ICD2014-39
A flip-flop achieving high-speed backup utilizing a Si transistor and long-term retention with zero standby power by mea... [more] SDM2014-70 ICD2014-39
 3件中 1~3件目  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

[Return to Top Page]

[Return to IEICE Web Page]

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan