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Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 29件中 1~20件目  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] 2020-01-24
09:30
Kanagawa Raiosha, Hiyoshi Campus, Keio University A Case Study of Development of Signal Processing Systems with RFSoC
Ryohei Niwase (e-trees), Makoto Negoro, Yuta Kawai (Osaka Univ.), Takefumi Miyoshi (e-trees)
 [more]
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] 2020-01-24
09:55
Kanagawa Raiosha, Hiyoshi Campus, Keio University Quantum control of electron spin qubit with RFSoC
Yuta Kawai, Takato Koide, Hiroki Imawaka, Koichiro Miyanishi (Osaka Univ.), Ryohei Niwase, Takefumi Miyoshi (e-trees), Makoto Negoro (Osaka Univ.)
 [more]
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] 2019-01-31
15:30
Kanagawa Raiosha, Hiyoshi Campus, Keio University
Takefumi Miyoshi (TOYOTA ITC) VLD2018-91 CPSY2018-101 RECONF2018-65
 [more] VLD2018-91 CPSY2018-101 RECONF2018-65
pp.119-124
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2018-12-06
09:50
Hiroshima Satellite Campus Hiroshima An Evaluation of Acceleration Framework to Exploit TCAM implemented on FPGA
Takefumi Miyoshi (WasaLab/e-trees.Japan), Satoshi Funada (e-trees.Japan) RECONF2018-39
 [more] RECONF2018-39
pp.27-31
RECONF 2018-09-18
15:40
Fukuoka LINE Fukuoka Cafe Space
Takefumi Miyoshi (TOYOTA ITC)
 [more]
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2015-12-01
14:15
Nagasaki Nagasaki Kinro Fukushi Kaikan Dynamic Reconfigurable PLA on FPGA and DSL-based Design Methodology
Takefumi Miyoshi (wasalabo/e-trees), Hiroki Nakahara (ehime university), Satoshi Funada (e-trees) RECONF2015-50
 [more] RECONF2015-50
pp.13-18
RECONF 2015-09-18
14:55
Ehime Ehime University Overview of the Reconfigurable Virtual Accelerator ReVA
Hironori Nakajo, Yuki Oigo (TUAT), Shozo Takeoka (AXE), Masashi Takemoto (BeatCraft), Takefumi Miyoshi (Wasalabo) RECONF2015-40
 [more] RECONF2015-40
pp.45-50
RECONF 2015-09-19
11:20
Ehime Ehime University An Approach with DSL for Building up FPGA Primitives
Takefumi Miyoshi (WasaLabo/e-tress), Satoshi Funada (e-trees) RECONF2015-46
 [more] RECONF2015-46
pp.75-80
RECONF 2015-06-20
13:10
Kyoto Kyoto University Introduction to 2015 FPGA Trax contest
Yasunori Osana (Univ. of the Ryukyus), Tomonori Izumi (Ritsmeikan Univ.), Takefumi Miyoshi (e-trees), Hiroki Nakahara (Ehime Univ.) RECONF2015-20
In 2015 IEICE RECONF design contest, Trax, a new board game is introduced. This paper briefly describes its rule, commun... [more] RECONF2015-20
pp.109-112
RECONF 2015-06-20
17:40
Kyoto Kyoto University An Implementation and Evaluation of A Generic Interface between PC and FPGA with AHCI
Takefumi Miyoshi, Satoshi Funada (e-trees) RECONF2015-30
 [more] RECONF2015-30
pp.165-170
ICD, CPSY 2014-12-01
13:40
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Accelerating I/O-Intensive Applications with FPGAs
Takefumi Miyoshi (e-trees/WasaLabo) ICD2014-76 CPSY2014-88
 [more] ICD2014-76 CPSY2014-88
pp.19-24
RECONF 2014-09-19
09:00
Hiroshima   [Invited Talk] Research & Development of FPGA Applications in A Company
Takefumi Miyoshi (e-trees.Japan) RECONF2014-26
 [more] RECONF2014-26
pp.51-56
CPSY, DC
(Joint)
2014-07-29
09:00
Niigata Toki Messe, Niigata Verification Method of the Split Circuit by High-Level Synthesis Tool in a Circuit Partitioning mechanism
Kazuya Matsuda (TAT), Takefumi Miyoshi (e-trees.Japan), Masashi Takemoto (TAT), Satoshi Funada (e-trees.Japan), Hironori Nakajo (TAT) CPSY2014-17
In recent years, a high-level synthesis tool has been attracted in designing hardware circuits instead of traditional HD... [more] CPSY2014-17
pp.43-48
RECONF 2014-06-12
15:35
Miyagi Katahira Sakura Hall Implementation of a RISC Processor with a Complex Instruction Accelerator -- Return to a CISC --
Ryota Suzuki (Tokyo Univ. of Agriculture and Tech.), Takefumi Miyoshi (e-trees), Hironori Nakajo (Tokyo Univ. of Agriculture and Tech.) RECONF2014-13
In this paper, we propose a RISC processor with an accelerator which can execute a complex instruction
with a co-proces... [more]
RECONF2014-13
pp.67-72
CPSY 2013-11-08
14:45
Hiroshima   A Proposal of Accelerator Coordination Architecture on Data Processing Infrastructure
Hideyuki Kawashima (Univ. of Tsukuba), Takefumi Miyoshi (e-trees) CPSY2013-49
 [more] CPSY2013-49
pp.55-60
RECONF 2013-09-19
10:35
Ishikawa Japan Advanced Institute of Science and Technology Hardware Acceleration of Inverted Pendulum Control Processing by Using the High Level Synthesis Tool JavaRock
Daichi Uetake, Takeshi Ohkawa (Utsunomiya Univ.), Takefumi Miyoshi (e-trees), Takashi Yokota, Kanemitsu Ootsu (Utsunomiya Univ.) RECONF2013-29
Microcontrollers are commonly used to develop robot control systems. However, microcontrollers do not meet recent requir... [more] RECONF2013-29
pp.55-60
CPSY, VLD, RECONF, IPSJ-SLDM [detail] 2013-01-17
10:00
Kanagawa   FPGA-based Implementation of Sliding-Window Aggregates over Disordered Data Streams
Yasin Oge, Masato Yoshimi (Univ. of Electro-Comm.), Takefumi Miyoshi (e-trees), Hideyuki Kawashima (Univ. of Tsukuba), Hidetsugu Irie, Tsutomu Yoshinaga (Univ. of Electro-Comm.) VLD2012-125 CPSY2012-74 RECONF2012-79
This paper proposes an order-agnostic implementation of sliding-window aggregate queries on an FPGA. Instead of bufferin... [more] VLD2012-125 CPSY2012-74 RECONF2012-79
pp.105-110
RECONF 2012-05-30
11:00
Okinawa Tiruru (Naha Okinawa, Japan) A Study of HW/SW Co-design with JavaRock
Takefumi Miyoshi, Satoshi Funada (e-trees) RECONF2012-21
 [more] RECONF2012-21
pp.119-124
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-29
13:00
Miyazaki NewWelCity Miyazaki A Study of Employing Java as A High-level Synthesis Language for FPGA
Takefumi Miyoshi (UEC), Satoshi Funada (e-trees) CPSY2011-43
 [more] CPSY2011-43
pp.3-8
DC, CPSY
(Joint)
2011-07-29
13:55
Kagoshima   An Availability Evaluation of GPU Programming Framework to Provide Embedded MPI
Keigo Shima, Takefumi Miyoshi, Masaaki Kondo, Hidetsugu Irie, Hiroki Honda, Tsutomu Yoshinaga (UEC) CPSY2011-17
We proposed a programming framework which enables
programmers to use MPI functions within GPU kernels.
The framework a... [more]
CPSY2011-17
pp.49-54
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