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Committee Date Time Place Paper Title / Authors Abstract Paper #
LQE, OPE, EMD, R, CPM 2016-08-26
Hokkaido   High speed circuit technology for VCSEL transceiver
Yukito Tsunoda, Takashi Shiraishi, Takayuki Shibasaki, Mariko Sugawara, Jun Matsui, Toshihiko Mori, Hideki Oku, Satoshi Ide, Kazuhiro Tanaka (Fujitsu Lab.) R2016-37 EMD2016-41 CPM2016-50 OPE2016-71 LQE2016-46
A high-density multi-rate VCSEL transceiver with CDRs was developed. A dual-loop hybrid CDR is developed including a pha... [more] R2016-37 EMD2016-41 CPM2016-50 OPE2016-71 LQE2016-46
(Joint) [detail]
Oita B-ConPlaza [Invited Talk] A 56-Gb/s Receiver Front-End with a CTLE and 1-Tap DFE in 20-nm CMOS
Yasufumi Sakai, Takayuki Shibasaki, Takumi Danjo, Hisakatsu Yamaguchi, Toshihiko Mori, Yoichi Koyanagi, Hirotaka Tamura (Fujitsu LAB.) VLD2014-96 CPM2014-127 ICD2014-70 CPSY2014-84 DC2014-50 RECONF2014-45
To meet ever-increasing demands for computing power in data centers, data rates over 50Gbps/signal (e.g., OIF CEI-56G-VS... [more] VLD2014-96 CPM2014-127 ICD2014-70 CPSY2014-84 DC2014-50 RECONF2014-45
pp.167-172(VLD), pp.27-32(CPM), pp.27-32(ICD), pp.69-74(CPSY), pp.167-172(DC), pp.63-68(RECONF)
ICD, ITE-IST 2013-07-04
Hokkaido San Refre Hakodate [Invited Talk] 32 Gb/s Data-Interpolator Receiver with 2-tap DFE in 28-nm CMOS
Yoshiyasu Doi, Takayuki Shibasaki, Takumi Danjo, Win Chaivipas, Takushi Hashida (Fujitsu Lab. Ltd.), Hiroki Miyaoka (FSL), Masanori Hoshino (FMSL), Yoichi Koyanagi (Fujitsu Lab. Ltd.), Takuji Yamamoto (FLA), Sanroku Tsukamoto, Hirotaka Tamura (Fujitsu Lab. Ltd.) ICD2013-27
We present a 32Gb/s data-interpolator receiver for electrical chip-to-chip communications. The receiver front-end is clo... [more] ICD2013-27
ICD, SDM 2006-08-17
Hokkaido Hokkaido University A 20-GHz Injection-Locked LC Divider with a 25-% Locking Range
Takayuki Shibasaki (Keio Univ.), Hirotaka Tamura, Kouichi Kanda, Hisakatsu Yamaguchi, Junji Ogawa (Fujitsu Laboratories LTD.), Tadahiro Kuroda (Keio Univ.)
 [more] SDM2006-138 ICD2006-92
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