|
|
All Technical Committee Conferences (Searched in: All Years)
|
|
Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
|
Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
HWS, VLD |
2019-02-27 17:10 |
Okinawa |
Okinawa Ken Seinen Kaikan |
Improvement on DMA Transfer Efficiency by Packet Concatenation Shoko Ohteru, Saki Hatta, Tomoaki Kawamura, Koji Yamazaki, Takahiro Hatano, Akihiko Miyazaki, Koyo Nitta (NTT) VLD2018-106 HWS2018-69 |
(To be available after the conference date) [more] |
VLD2018-106 HWS2018-69 pp.79-84 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-06 11:20 |
Hiroshima |
Satellite Campus Hiroshima |
An FPGA-NIC Based 40-Gbit/s Automated Response Circuit for Invalid DNS Packets to Suppress CPU Utilization of DNS Content Server Shoko Ohteru, Saki Hatta, Tomoaki Kawamura (NTT), Koji Yamazaki (NTT-AT), Takahiro Hatano, Akihiko Miyazaki, Koyo Nitta (NTT) VLD2018-55 DC2018-41 |
(To be available after the conference date) [more] |
VLD2018-55 DC2018-41 pp.113-118 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-03 14:35 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Hash-table and Balanced-tree based FIB Architecture for CCN Routers Reducing Memory Accesses Kenta Shimazaki (Waseda Univ.), Takashi Aoki, Takahiro Hatano, Takuya Otsuka, Akihiko Miyazaki (NTT), Toshitaka Tsuda, Yong-Jin Park, Nozomu Togawa (Waseda Univ.) VLD2015-75 DC2015-71 |
In conventional IP network, an IP router just forwards a packet to
another router.
Recently, Content Centric Networki... [more] |
VLD2015-75 DC2015-71 pp.243-248 |
VLD |
2012-03-06 13:10 |
Oita |
B-con Plaza |
10G/1G dual-rate EPON OLT LSI with dual encryption modes selected using DBA-information-based algorithm control Sadayuki Yasuda, Takahiro Hatano, Hiroki Suto, Masami Urano, Mamoru Nakanishi, Tsugumichi Shibata (NTT) VLD2011-124 |
For next-generation optical access systems, we developed a 10G/1G dual-rate EPON OLT LSI that fully conforms to the IEEE... [more] |
VLD2011-124 pp.25-30 |
VLD |
2009-03-12 11:05 |
Okinawa |
|
High-Speed Packet-Filter Circuit with Mismatch-Detection Circuit Naoki Miura, Satoshi Shigematsu, Takahiro Hatano (NTT), Yusuke Akamine (Kyushu Univ.), Mamoru Nakanishi, Masami Urano (NTT) VLD2008-143 |
(To be available after the conference date) [more] |
VLD2008-143 pp.101-106 |
|
|
|
Copyright and reproduction :
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
|
[Return to Top Page]
[Return to IEICE Web Page]
|