Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
HWS, VLD |
2023-03-04 13:55 |
Okinawa |
(Primary: On-site, Secondary: Online) |
* Masaru Mashiba, Kazuki Monta (Kobe Univ.), Takaaki Okidono (SCU), Takuzi Miki, Nagata Makoto (Kobe Univ.) VLD2022-121 HWS2022-92 |
With the development of IoT, security is becoming increasingly important. Confidential information and other information... [more] |
VLD2022-121 HWS2022-92 pp.267-272 |
HWS, VLD |
2023-03-04 14:20 |
Okinawa |
(Primary: On-site, Secondary: Online) |
Side-channel Information Leakage Resistance Evaluation of Cryptographic Multi- chip Modules Takumi Matsumaru, Kazuki Monta (Kobe Univ.), Takaaki Okidono (SCU), Takuzi Miki, Makoto Nagata (Kobe Univ.) VLD2022-122 HWS2022-93 |
Demand for multi-chip packaging technology is rising. This study focuses on two types of packaging technologies in parti... [more] |
VLD2022-122 HWS2022-93 pp.273-278 |
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] |
2022-11-29 14:40 |
Kumamoto |
(Primary: On-site, Secondary: Online) |
Evaluating system level security of cryptography module Takumi Matsumaru, Kazuki Monta (Kobe Univ.), Takaaki Okidono (SCU), Takuji Miki, Makoto Nagata (Kobe Univ.) VLD2022-32 ICD2022-49 DC2022-48 RECONF2022-55 |
Packaging technology is a technique used to encapsulate semiconductor chips in a frame, and has been attracting attentio... [more] |
VLD2022-32 ICD2022-49 DC2022-48 RECONF2022-55 pp.78-81 |
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] |
2022-11-29 15:05 |
Kumamoto |
(Primary: On-site, Secondary: Online) |
Evaluation of power delivery networks in secure semiconductor systems Masaru Mashiba, Kazuki Monta (Kobe Univ.), Takaaki Okidono (SCU), Takuzi Miki, Makoto Nagata (Kobe Univ.) VLD2022-33 ICD2022-50 DC2022-49 RECONF2022-56 |
With the development of the IoT, hardware security is becoming increasingly important. Physical attacks on cryptoprocess... [more] |
VLD2022-33 ICD2022-50 DC2022-49 RECONF2022-56 pp.82-86 |
HWS, VLD [detail] |
2021-03-04 14:15 |
Online |
Online |
Experiments of Data Authenticity Verification in Multi-Node IoT Systems Using Elliptic Curve Digital Signature Chips Yuya Takahashi, Takuya Matsumaru, Kazuki Monta (Kobe Univ.), Toshihiro Sato, Takaaki Okidono (ECSEC Lab), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) VLD2020-85 HWS2020-60 |
Practicality of IoT systems requires the efficiency and speed of crypto processing in edge nodes and remote servers. So ... [more] |
VLD2020-85 HWS2020-60 pp.97-101 |
VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-18 14:25 |
Online |
Online |
On-chip power supply noise monitoring for evaluation of multi-chip board power delivery networks Daichi Nakagawa, Kazuki Yasuda, Masaru Mashiba, Kazuki Monta, Takaaki Okidono, Takuji Miki, Makoto Nagata (Kobe Univ) VLD2020-31 ICD2020-51 DC2020-51 RECONF2020-50 |
In these days, information and communication technology has been evolving more and more, and hardware security has been ... [more] |
VLD2020-31 ICD2020-51 DC2020-51 RECONF2020-50 pp.115-117 |
VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-18 14:50 |
Online |
Online |
Evaluation of operating performance of ECDSA hardware module II Yuya Takahashi, Takuya Matsumaru, Kazuki Monta (Kobe Univ.), Toshihiro Sato, Takaaki Okidono (ECSEC Lab), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) VLD2020-32 ICD2020-52 DC2020-52 RECONF2020-51 |
[more] |
VLD2020-32 ICD2020-52 DC2020-52 RECONF2020-51 pp.118-121 |
ICD, SDM, ITE-IST [detail] |
2020-08-06 13:50 |
Online |
Online |
Over-the-top Si Interposer Embedding Backside Buried Metal to Reduce Power Supply Impedance Takuji Miki, Makoto Nagata, Akihiro Tsukioka (Kobe Univ.), Noriyuki Miura (Osaka Univ.), Takaaki Okidono (ECSEC), Yuuki Araga, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi (AIST) SDM2020-5 ICD2020-5 |
A 2.5D structure with a Si interposer stacked on a CMOS chip is developed to reduce power supply impedance. A backside b... [more] |
SDM2020-5 ICD2020-5 pp.19-24 |
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-15 10:05 |
Ehime |
Ehime Prefecture Gender Equality Center |
Evaluation of operating performance of ECDSA hardware module Yuya Takahashi, Monta kazuki (Kobe Univ.), Toshihiro Sato, Takaaki Okidono (ECSEC Lab), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) ICD2019-35 IE2019-41 |
There are limits to how much IoT power and encryption speed can be improved at the software level. Therefore, it is nece... [more] |
ICD2019-35 IE2019-41 pp.37-40 |
HWS, VLD |
2019-03-02 10:25 |
Okinawa |
Okinawa Ken Seinen Kaikan |
ASIC Chip Implementation and Evaluation of Elliptic Curve Digital Signature Algorithm Sosuke Sato, Hiroki Yoshida, Kazuki Monta (Kobe Univ.), Takaaki Okidono (ECSEC), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) VLD2018-138 HWS2018-101 |
We have designed and fabricated application specific semiconductor integrated circuit (ASIC) chips that embody the gener... [more] |
VLD2018-138 HWS2018-101 pp.267-269 |
ICD, CPSY, CAS |
2018-12-23 09:30 |
Okinawa |
|
[Poster Presentation]
Evaluation of side-channel leakage in crypto modules with On-Chip-Monitor Kazuki Monta, Hiroki Sonoda, Akihiro Tsukioka (Kobe Univ.), Takaaki Okidono (ECSEC), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) CAS2018-103 ICD2018-87 CPSY2018-69 |
[more] |
CAS2018-103 ICD2018-87 CPSY2018-69 p.101 |
HWS, ICD |
2018-10-29 13:25 |
Osaka |
Kobe Univ. Umeda Intelligent Laboratory |
Countermeasures for power noise and side-channel leakage in crypto fmodules (I) Kazuki Monta, Sousuke Sato, Akihiro Tsukioka (Kobe Univ.), Takaaki Okidono (ECSEC), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) HWS2018-48 ICD2018-40 |
[more] |
HWS2018-48 ICD2018-40 pp.7-11 |