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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 7 of 7  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, RECONF, ICD, IPSJ-SLDM
(Joint) [detail]
2020-11-18
14:25
Online On line On-chip power supply noise monitoring for evaluation of multi-chip board power delivery networks
Daichi Nakagawa, Kazuki Yasuda, Masaru Mashiba, Kazuki Monta, Takaaki Okidono, Takuji Miki, Makoto Nagata (Kobe Univ)
 [more]
VLD, DC, RECONF, ICD, IPSJ-SLDM
(Joint) [detail]
2020-11-18
14:50
Online On line Evaluation of operating performance of ECDSA hardware module II
Yuya Takahashi, Takuya Matsumaru, Kazuki Monta (Kobe Univ.), Toshihiro Sato, Takaaki Okidono (ECSEC Lab), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.)
 [more]
ICD, SDM, ITE-IST [detail] 2020-08-06
13:50
Online Online Over-the-top Si Interposer Embedding Backside Buried Metal to Reduce Power Supply Impedance
Takuji Miki, Makoto Nagata, Akihiro Tsukioka (Kobe Univ.), Noriyuki Miura (Osaka Univ.), Takaaki Okidono (ECSEC), Yuuki Araga, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi (AIST) SDM2020-5 ICD2020-5
A 2.5D structure with a Si interposer stacked on a CMOS chip is developed to reduce power supply impedance. A backside b... [more] SDM2020-5 ICD2020-5
pp.19-24
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-15
10:05
Ehime Ehime Prefecture Gender Equality Center Evaluation of operating performance of ECDSA hardware module
Yuya Takahashi, Monta kazuki (Kobe Univ.), Toshihiro Sato, Takaaki Okidono (ECSEC Lab), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) ICD2019-35 IE2019-41
There are limits to how much IoT power and encryption speed can be improved at the software level. Therefore, it is nece... [more] ICD2019-35 IE2019-41
pp.37-40
HWS, VLD 2019-03-02
10:25
Okinawa Okinawa Ken Seinen Kaikan ASIC Chip Implementation and Evaluation of Elliptic Curve Digital Signature Algorithm
Sosuke Sato, Hiroki Yoshida, Kazuki Monta (Kobe Univ.), Takaaki Okidono (ECSEC), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) VLD2018-138 HWS2018-101
We have designed and fabricated application specific semiconductor integrated circuit (ASIC) chips that embody the gener... [more] VLD2018-138 HWS2018-101
pp.267-269
ICD, CPSY, CAS 2018-12-23
09:30
Okinawa   [Poster Presentation] Evaluation of side-channel leakage in crypto modules with On-Chip-Monitor
Kazuki Monta, Hiroki Sonoda, Akihiro Tsukioka (Kobe Univ.), Takaaki Okidono (ECSEC), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) CAS2018-103 ICD2018-87 CPSY2018-69
 [more] CAS2018-103 ICD2018-87 CPSY2018-69
p.101
HWS, ICD 2018-10-29
13:25
Osaka Kobe Univ. Umeda Intelligent Laboratory Countermeasures for power noise and side-channel leakage in crypto fmodules (I)
Kazuki Monta, Sousuke Sato, Akihiro Tsukioka (Kobe Univ.), Takaaki Okidono (ECSEC), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) HWS2018-48 ICD2018-40
 [more] HWS2018-48 ICD2018-40
pp.7-11
 Results 1 - 7 of 7  /   
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