Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
MI, MICT [detail] |
2019-11-05 10:40 |
Ibaraki |
Univ. of Tsukuba |
A study on biosignal sensing using textile electrodes Shogo Amano, Mizuki Matsuba, Shintaro Izumi, Shusuke Yoshimoto, Yuki Noda, Teppei Araki, Takafumi Uemura (Osaka Univ.), Haruhiko Itou (Teijin), Tsuyoshi Sekitani (Osaka Univ.) MICT2019-27 MI2019-54 |
(To be available after the conference date) [more] |
MICT2019-27 MI2019-54 pp.15-16 |
EMCJ, MICT (Joint) |
2019-03-15 15:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Noise Evaluation Method for EEG Measurement System Misaki Inaoka, Shintaro Izumi, Shusuke Yoshimoto, Toshikazu Nezu, Yuki Noda, Teppei Araki, Takafumi Uemura, Tsuyoshi Sekitani (Osaka Univ.) MICT2018-72 |
A test equipment that can evaluate the contact resistance and amount of noise of EEG sensors is proposed in this study. ... [more] |
MICT2018-72 pp.23-26 |
SDM, ICD, ITE-IST [detail] |
2018-08-09 09:30 |
Hokkaido |
Hokkaido Univ., Graduate School of IST M Bldg., M151 |
[Invited Talk]
Flexible sensing system and venture startup Shusuke Yoshimoto (PGV) SDM2018-44 ICD2018-31 |
[more] |
SDM2018-44 ICD2018-31 p.101 |
ICD, CPSY |
2016-12-15 13:00 |
Tokyo |
Tokyo Institute of Technology |
[Invited Talk]
Circuit and System Design using Flexible Sensor with Cross-Sectoral Cooperation Shusuke Yoshimoto (Osaka Univ.) ICD2016-55 CPSY2016-61 |
[more] |
ICD2016-55 CPSY2016-61 pp.25-28 |
ICD, CPSY |
2016-12-15 15:30 |
Tokyo |
Tokyo Institute of Technology |
[Poster Presentation]
Pressure Sensor for Artificial Knee Joint Replacement Fumika Tanabe, Shusuke Yoshimoto, Yuki Noda, Teppei Araki, Takafumi Uemura, Yoshinori Takeuchi, Masaharu Imai, Tsuyoshi Sekitani (Osaka Univ.) ICD2016-62 CPSY2016-68 |
[more] |
ICD2016-62 CPSY2016-68 p.43 |
ICD, CPSY |
2016-12-15 15:30 |
Tokyo |
Tokyo Institute of Technology |
[Poster Presentation]
Development of a flexible differential amplifier using p-type organic transistors Masahiro Sugiyama, Takahumi Uemura, Shusuke Yoshimoto, Mihoko Akiyama, Teppei Araki, Tsuyoshi Sekitani (Osaka Univ.) ICD2016-78 CPSY2016-84 |
(To be available after the conference date) [more] |
ICD2016-78 CPSY2016-84 p.83 |
ICD, SDM, ITE-IST [detail] |
2016-08-02 10:40 |
Osaka |
Central Electric Club |
[Invited Talk]
Patch-type EEG System with Stretchable Electrode Sheet for Medical Application Shusuke Yoshimoto, Teppei Araki, Takafumi Uemura, Toshikazu Nezu, Masaya Kondo (Osaka Univ.), Kenichi Sasai (Panasonic), Masayuki Iwase, Hideki Satake, Akio Yoshida (Mektron), Mitsuru Kikuchi (Kanazawa Univ.), Tsuyoshi Sekitani (Osaka Univ.) SDM2016-56 ICD2016-24 |
[more] |
SDM2016-56 ICD2016-24 p.63 |
ICD |
2016-04-14 11:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Lecture]
A 298-fJ/writecycle 650-fJ/readcycle 8T Three-Port SRAM in 28-nm FD-SOI Process Technology for Image Processor Haruki Mori, Tomoki Nakagawa, Yuki Kitahara, Yuta Kawamoto, Kenta Takagi, Shusuke Yoshimoto, Shintaro Izumi (Kobe Univ.), Koji Nii (Renesas Electronics), Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2016-3 |
This paper presents a low-power and low-voltage 64-kb 8T three-port image memory using a 28-nm FD-SOI process technology... [more] |
ICD2016-3 pp.13-16 |
ICD |
2014-04-18 09:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A 0.38-V Operating STT-MRAM with Process Variation Tolerant Sense Amplifier Yohei Umeki, Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi (Kobe Univ.), Koji Tsunoda, Toshihiro Sugii (LEAP) ICD2014-10 |
This paper exhibits a 65-nm 8-Mb spin transfer torque magnetoresistance random access memory (STT-MRAM) operating at a s... [more] |
ICD2014-10 pp.47-51 |
ICD |
2014-01-28 15:00 |
Kyoto |
Kyoto Univ. Tokeidai Kinenkan |
[Poster Presentation]
STT-MRAM Architecture for Improving Throughput Haruki Mori, Koji Yanagida, Yohei Umeki, Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi (Kobe Univ.), Koji Tsunoda, Toshihiro Sugii (LEAP) ICD2013-110 |
STT-MRAM (Spin Torque Transfer Magnetic Random Access Memory) attracts an attention as the substitute memory of SRAM. Th... [more] |
ICD2013-110 p.27 |
ICD |
2014-01-28 15:00 |
Kyoto |
Kyoto Univ. Tokeidai Kinenkan |
[Poster Presentation]
High-Speed Ferroelectric 6T4C Shadow SRAM for Normally-Off Computing Tomoki Nakagawa, Shusuke Yoshimoto, Yuki Kitahara, Koji Yanagida, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2013-115 |
In recent years, sensor network has attracted much attention in agricultural, medical, and disaster-prevention area to c... [more] |
ICD2013-115 p.39 |
ICD |
2014-01-28 15:00 |
Kyoto |
Kyoto Univ. Tokeidai Kinenkan |
[Poster Presentation]
Low-Power 28nm FD-SOI SRAM for Image Processor Yuta Kawamoto, Shusuke Yoshimoto, Tomoki Nakagawa, Yuki Kitahara, Haruki Mori, Kenta Takagi, Shintaro Izumi (Kobe Univ.), Koji Nii (Renesas Electronics), Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2013-116 |
In recent years, image recognition has been applied to various fields such as an automatic driving system. SRAM (Static ... [more] |
ICD2013-116 p.41 |
ICD |
2013-04-12 16:20 |
Ibaraki |
Advanced Industrial Science and Technology (AIST) |
NMOS-Inside 6T SRAM Layout Reducing Neutron-Induced Multiple Cell Upsets Shusuke Yoshimoto, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2013-23 |
This paper presents a proposed NMOS-centered 6T SRAM cell layout that reduces a neutron-induced multiple-cell-upset (MCU... [more] |
ICD2013-23 pp.121-126 |
ICD |
2012-12-17 15:55 |
Tokyo |
Tokyo Tech Front |
[Poster Presentation]
Low-Power Ferroelectric 6T4C Shadow SRAM for Normally-Off Computing Tomoki Nakagawa, Shusuke Yoshimoto, Yuki Kitahara, Koji Yanagida, Yohei Umeki, Shunsuke Okumura, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2012-98 |
In recent years, sensor network has attracted much attention in agricultural, medical, and disaster-prevention area to c... [more] |
ICD2012-98 p.41 |
ICD, SDM |
2012-08-02 09:35 |
Hokkaido |
Sapporo Center for Gender Equality, Sapporo, Hokkaido |
A 40-nm 256-Kb Sub-10 pJ/Access 8T SRAM with Read Bitline Amplitude Limiting (RBAL) Scheme Shusuke Yoshimoto, Masaharu Terada, Yohei Umeki, Shunsuke Okumura (Kobe Univ.), Atsushi Kawasumi, Toshikazu Suzuki, Shinichi Moriwaki, Shinji Miyano (STARC), Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) SDM2012-64 ICD2012-32 |
[more] |
SDM2012-64 ICD2012-32 pp.7-12 |
ICD |
2012-04-24 14:15 |
Iwate |
Seion-so, Tsunagi Hot Spring (Iwate) |
A 40-nm 0.5-V 12.9-pJ/Access 8T SRAM Using Low-Energy Disturb Mitigation Scheme Shusuke Yoshimoto, Masaharu Terada, Shunsuke Okumura (Kobe Univ.), Toshikazu Suzuki, Shinji Miyano (STARC), Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2012-14 |
This paper presents a novel disturb mitigation scheme which achieves low-power and low-voltage operation for a deep sub-... [more] |
ICD2012-14 pp.73-78 |
ICD |
2012-04-24 15:15 |
Iwate |
Seion-so, Tsunagi Hot Spring (Iwate) |
Low-Energy Block-Level Instantaneous Comparison 7T SRAM for Dual Modular Redundancy Yohei Umeki, Shunsuke Okumura, Yohei Nakata, Koji Yanagida, Yuki Kagiyama, Shusuke Yoshimoto, Hiroshi Kawaguchi (Kobe Univ.), Masahiko Yoshimoto (Kobe Univ./JST) ICD2012-16 |
This paper proposes a 7T SRAM that realizes a block-level instantaneous comparison feature. The proposed SRAM is useful ... [more] |
ICD2012-16 pp.85-90 |
ICD |
2012-04-24 16:05 |
Iwate |
Seion-so, Tsunagi Hot Spring (Iwate) |
A 128-bit Chip Identification Generating Scheme Exploiting SRAM Bitcells with Failure Rate of 4.45X 10-19 Shunsuke Okumura, Shusuke Yoshimoto, Hiroshi Kawaguchi (Kobe Univ.), Masahiko Yoshimoto (Kobe Univ., JST CREST) ICD2012-18 |
We propose a chip identification (ID) generating scheme with random variation of transistor characteristics in SRAM bitc... [more] |
ICD2012-18 pp.97-102 |
ICD |
2011-12-16 14:25 |
Osaka |
|
0.42-V 576-kb 0.15-um FD-SOI SRAM with 7T/14T Bit Cells and Substrate Bias Control Circuits for Intra-Die and Inter-Die Variability Compensation Shusuke Yoshimoto, Kosuke Yamaguchi, Shunsuke Okumura, Masahiko Yoshimoto, Hiroshi Kawaguchi (Kobe Univ.) ICD2011-133 |
We propose 7T/14T FD-SOI SRAM with a substrate bias control mechanism. The 14T configuration suppresses intra-die variat... [more] |
ICD2011-133 pp.155-160 |
ICD |
2011-12-16 14:50 |
Osaka |
|
Multiple-Bit-Upset and Single-Bit-Upset Resilient 8T SRAM Bitcell Layout with Divided Wordline Structure Yohei Umeki, Shusuke Yoshimoto, Takurou Amashita, Hiroshi Kawaguchi (Kobe Univ.), Masahiko Yoshimoto (Kobe Univ./JST) ICD2011-134 |
This paper presents a new 8T (8-transistor) SRAM cell layout mitigating multiple-bit upset (MBU) in a divided wordline s... [more] |
ICD2011-134 pp.161-166 |