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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF, VLD | 2024-01-29 10:30 |
Kanagawa | AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
Random number generation on the Rocket core with a built-in LFSR Takayoshi Shikano, Shuichi Ichikawa (Toyohashi Tech.)  VLD2023-80 RECONF2023-83 |
Masaoka et al. developed an unpredictable random number generator (URNG) using a built-in linear feedback shift register... [more] | VLD2023-80 RECONF2023-83 pp.1-6 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-16 14:10 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
Hardware obfuscation method using Obfuscator-LLVM and Bambu Mikiya Ogura, Shuichi Ichikawa (Toyohashi Univ. Tech.) VLD2023-54 ICD2023-62 DC2023-61 RECONF2023-57 |
Hardware obfuscation serves as a countermeasure against hardware reverse engineering. Yamada et al. employed the OLLVM s... [more] | VLD2023-54 ICD2023-62 DC2023-61 RECONF2023-57 pp.125-130 |
| VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-15 09:15 |
Ehime | Ehime Prefecture Gender Equality Center | A preliminary study on obfuscation measures for hardware obfuscation Shotaro Yamada, Shuichi Ichikawa (TUT) CPSY2019-45 |
[more] | CPSY2019-45 pp.29-34 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2019-01-31 14:00 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Preliminary evaluation of special instruction implementation methods by high level synthesis Ryodai Iwamoto, Naoki Fujieda, Shuichi Ichikawa, Joji Sakamoto (TUT) VLD2018-88 CPSY2018-98 RECONF2018-62 |
Protection of intellectual properties and technical know-how is an important issue.In our previous work, we proposed imp... [more] | VLD2018-88 CPSY2018-98 RECONF2018-62 pp.101-106 |
| ASN, SRW (Joint) |
2018-11-05 13:00 |
Tokyo | Tokyo Denki University, Tokyo Senju Campus | [Poster Presentation]
FPGA Implementation of Underwater Communication System used LED Yuki Matsuda, Kei Miyagi, Chikatoshi Yamada, Shoichi Tanifuji (NIT,Okinawa College), Shuichi Ichikawa (TUT) ASN2018-61 SRW2018-26 |
Autonomous underwater robots are used for deep sea surveys. acoustic communication was used for communication with the ... [more] |
ASN2018-61 SRW2018-26 pp.43-46(ASN), pp.19-22(SRW) |
| CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] | 2017-01-24 13:55 |
Kanagawa | Hiyoshi Campus, Keio Univ. | Expression of Positional registers for Tamper resistance Kiyohiro Sato, Naoki Fujieda, Shuichi Ichikawa (TUT) VLD2016-86 CPSY2016-122 RECONF2016-67 |
[more] | VLD2016-86 CPSY2016-122 RECONF2016-67 pp.109-114 |
| RECONF, CPSY, VLD, IPSJ-SLDM [detail] | 2015-01-30 15:15 |
Kanagawa | Hiyoshi Campus, Keio University | MieruSys Project : Developing an Advanced Computer System with Multiple FPGAs Yuki Matsuda, Eri Ogawa, Tomohiro Misono (Tokyo Tech), Naoki Fujieda, Shuichi Ichikawa (TUT), Kenji Kise (Tokyo Tech) VLD2014-146 CPSY2014-155 RECONF2014-79 |
This paper describes the design and current development of MieruSys project which develops a future computer system with... [more] | VLD2014-146 CPSY2014-155 RECONF2014-79 pp.211-216 |
| RECONF, CPSY, VLD, IPSJ-SLDM [detail] | 2015-01-30 15:55 |
Kanagawa | Hiyoshi Campus, Keio University | Obfuscated Hardware Implementation of PLC Instructions with Opaque Predicates Kazuki Uyama, Naoki Fujieda, Shuichi Ichikawa (Toyohashi Tech.) VLD2014-148 CPSY2014-157 RECONF2014-81 |
Tamper-proofing technology for instruction sequences of programmable logic controllers（PLCs）is required to protect trade... [more] | VLD2014-148 CPSY2014-157 RECONF2014-81 pp.221-226 |
| RECONF | 2010-05-14 09:55 |
Nagasaki | An FPGA Implementation of Tracking Control System with Vibration Control Yasuaki Tezuka, Shuichi Ichikawa, Yoshiyuki Noda (TUT) RECONF2010-11 |
Recent control systems are required to finish massive and complex calculations in a very short period. Hardware impleme... [more] |
RECONF2010-11 pp.57-62 |
|
| IPSJ-SLDM, VLD, CPSY, RECONF [detail] | 2010-01-26 16:45 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Hardware Specialization of Digital Filters for Vibration Control Yasuaki Tezuka, Shuichi Ichikawa, Yoshiyuki Noda (Toyohashi Univ. of Tech.) VLD2009-82 CPSY2009-64 RECONF2009-67 |
The logic circuit can generally be reduced, if any input of the circuit is given as a constant. The derived circuit mig... [more] |
VLD2009-82 CPSY2009-64 RECONF2009-67 pp.83-88 |
| VLD, CPSY, RECONF, IPSJ-SLDM | 2009-01-29 10:30 |
Kanagawa | FPGA Implementation of Metastability-based True Random Number Generator Hisashi Hata, Shuichi Ichikawa (TUT) VLD2008-95 CPSY2008-57 RECONF2008-59 |
Metastability of RS latch is utilizable as an entropy source for true random number generators (TRNG). This kind of TRNG... [more] | VLD2008-95 CPSY2008-57 RECONF2008-59 pp.25-30 |
|
| VLD, CPSY, RECONF, IPSJ-SLDM | 2007-01-17 16:50 |
Tokyo | Keio Univ. Hiyoshi Campus | Converting PLC instruction sequence into logic circuit: implementation and evaluation Masanori Akinaka, Shuichi Ichikawa (Toyohashi Univ. Tech.) |
By implementing a control program with hard-wired logic using reconfigurable devices (e.g., FPGA), a flexible and highly... [more] | VLD2006-92 CPSY2006-63 RECONF2006-63 pp.43-48 |
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