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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, ITE-IST 2012-07-26
14:20
Yamagata Yamagata University [Invited Talk] Smart Power LSI Technology Development -- High Performance and High Reliability BiC-DMOS Device Development --
Kenichi Hatasako, Tetsuya Nitta, Masami Hane, Shigeto Maegawa (Renesas Electronics Co.) ICD2012-23
This paper presents high performance and high reliability BiC-DMOS device development, which act as the driving force de... [more] ICD2012-23
pp.25-29
ICD 2005-12-16
11:15
Kochi   Bootstrap Pass-Transistor Logic with Active Body-Biasing Control on PD-SOI
Masaaki Iijima, Masayuki Kitamura, Kenji Hamada, Masahiro Numa (Kobe Univ.), Akira Tada, Shigeto Maegawa (Renesas)
(To be available after the conference date) [more] ICD2005-197
pp.31-36
ICD 2005-12-16
11:40
Kochi   High Performance CMOS Circuit by using Charge Recycling Actively Body-bias Controlled SOI
Masayuki Kitamura, Masaaki Iijima, Kenji Hamada, Masahiro Numa (Kobe Univ.), Hiromi Notani, Akira Tada, Shigeto Maegawa (Renesas)
In this paper, we propose a new technique in order to achieve speed up without increase in leakage current by using acti... [more] ICD2005-198
pp.37-42
SIP, ICD, IE, IPSJ-SLDM 2005-10-20
16:30
Miyagi Ichinobo, Sakunami-Spa A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI
Takayuki Gyohten, Fukashi Morishita, Hideyuki Noda (Renesas Technology Corp.), Mako Okamoto (Daioh Electric Corp.), Takashi Ipposhi, Shigeto Maegawa, Katsumi Dosaka, Kazutami Arimoto (Renesas Technology Corp.)
We propose a novel capacitorless twin-transistor random access memory (TTRAM). The 2Mb test device has been fabricated o... [more] SIP2005-113 ICD2005-132 IE2005-77
pp.107-112
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