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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| HWS, VLD | 2023-03-02 13:50 |
Okinawa | (Primary: On-site, Secondary: Online) |
[Memorial Lecture]
CNFET7: An Open Source Cell Library for 7-nm CNFET Technology Chenlin Shi, Shinobu Miwa (UEC), Tongxin Yang, Ryota Shioya (UOT), Hayato Yamaki, Hiroki Honda (UEC)  VLD2022-92 HWS2022-63 |
In this paper, we propose CNFET7, the first open-source cell library for7-nm carbon nanotube field-effect transistor (CN... [more] | VLD2022-92 HWS2022-63 p.110 |
| PRMU | 2021-12-17 15:15 |
Online | Online | An LSTM-based prefetcher exploiting delta correlation Hiroki Taniai, Tomoki Nakamura, Toru Koizumi, Yuya Degawa, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya (Tokyo Univ.) PRMU2021-53 |
Prefetching is one of the major hardware techniques to improve the execution performance of programs in modern processor... [more] | PRMU2021-53 pp.160-164 |
| CPSY, DC, IPSJ-ARC [detail] | 2020-07-30 11:00 |
Online | Online | Instruction Prefetcher focusing on properties of Prefetch Distance Tomoki Nakamura, Toru Koizumi, Yuya Degawa, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya (UTokyo) CPSY2020-1 DC2020-1 |
Instruction cache misses and branch target buffer (BTB) misses are performance bottlenecks in recent applications, and ... [more] |
CPSY2020-1 DC2020-1 pp.1-8 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2020-02-27 17:00 |
Kagoshima | Yoron-cho Chuou-Kouminkan | HLS by multi-objective optimization under resource constraints
-- Approach to extracting coarse-grained parallelism using functional language -- Fukuhei Hamazaki, Tetsuro Yamazaki, Ryota Shioya (U-Tokyo), Kenichi Koizumi, Hiroshi Tezuka, Mary Inaba (U-Tokyo) CPSY2019-104 DC2019-110 |
For engineers who are not familiar with circuits, it is difficult to optimize circuit considering trade-off factors such... [more] | CPSY2019-104 DC2019-110 pp.99-104 |
| CPSY | 2014-10-10 11:20 |
Chiba | Meeting Room 303, International Conference Hall, Makuhari-Messe | Verification of a comprehensive injection attack detection with dynamic information tracking Hidenori Tsuji, Fumihiko Takayama, Wataru Kitada (IIT), Ryota Shioya (Nagoya Univ.), Masahiro Goshima (NII) CPSY2014-49 |
To detect injection attacks for Web applications, DTP (Dynamic Taint Propagation) has been researched. However conventio... [more] | CPSY2014-49 pp.13-18 |
| CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] | 2014-03-16 09:00 |
Okinawa | The design and implementation of area-efficient processor "Raishodo" Akifumi Fujita, Naruki Kurata (Univ. of Tokyo), Ryota Shioya (Nagoya Univ.), Masahiro Goshima, Shuichi Sakai (Univ. of Tokyo) CPSY2013-107 DC2013-94 |
Although a superscalar processor has high perfomance, its circuit area is very large. Area reduction of a superscalar p... [more] | CPSY2013-107 DC2013-94 pp.229-234 |
|
| DC, CPSY (Joint) |
2011-07-29 09:50 |
Kagoshima | Preliminary Experiment of A Clocking Scheme Enabling Dynamic Time Borrowing Shuji Yoshida, Satoshi Arima, Naruki Kurata (The Univ. of Tokyo), Ryota Shioya (Nagoya Univ.), Masahiro Goshima, Shuichi Sakai (The Univ. of Tokyo) CPSY2011-11 |
The feature size of LSI is getting smaller year by year, increasing random variability between the el- ements. These da... [more] |
CPSY2011-11 pp.13-18 |
|
| DC, CPSY (Joint) |
2011-07-29 10:45 |
Kagoshima | Partial Platform Attestation Kaoru Hayakawa (Univ. of Tokyo), Ryota Shioya (Nagoya Univ.), Masahiro Goshima, Shuichi Sakai (Univ. of Tokyo) CPSY2011-12 |
It is becoming a serious problem that a program which a server distributed is leaked by modifying or cracking a client’s... [more] | CPSY2011-12 pp.19-24 |
|
| DC, CPSY | 2011-04-12 15:45 |
Tokyo | Transient-Fault-Tolerant Out-of-Order Superscalar Processor Satoshi Arima, Takashi Okada, Ryota Shioya, Masahiro Goshima, Shuichi Sakai (The Univ. of Tokyo) CPSY2011-5 DC2011-5 |
Recently, LSI is shrinking and random-variability problem is increasing. For further growth of semiconductor industry, c... [more] | CPSY2011-5 DC2011-5 pp.23-28 |
|
| DC, CPSY | 2010-04-13 16:20 |
Tokyo | Improvement of Transient-Fault-Tolerant Scheme for Out-of-Order Superscalar Processors Satoshi Arima, Takashi Okada, Takanobu Kita, Ryota Shioya, Masahiro Goshima, Shuichi Sakai (The Univ. of Tokyo) CPSY2010-5 DC2010-5 |
The feature size of LSI is getting smaller year by year, increasing random variation between the elements. To overcome t... [more] | CPSY2010-5 DC2010-5 pp.21-26 |
|
| DC, CPSY | 2010-04-13 17:20 |
Tokyo | Fault-tolerant FPGA Architecture Takashi Okada, Takanobu Kita, Ryota Shioya, Masahiro Goshima, Shuichi Sakai (Tokyo Univ.) CPSY2010-7 DC2010-7 |
Since electric devices for space applications are likely to experience radiation induced errors, such as the Single Even... [more] | CPSY2010-7 DC2010-7 pp.33-37 |
|
| CPSY | 2009-10-20 10:30 |
Tokyo | 212, 1F, Bldg.E-2, The University of Tokyo | A Platform for Preventing Information Leakage Yuki Yokota, Ryota Shioya, Masahiro Goshima, Shuichi Sakai (Univ. of Tokyo.) CPSY2009-28 |
Today, people get big advantages from recent rapid development of information technology. On the other way, however, man... [more] | CPSY2009-28 pp.7-12 |
| CPSY | 2009-10-20 11:00 |
Tokyo | 212, 1F, Bldg.E-2, The University of Tokyo | Platforms Attestation for Preventing Information Leakage Youngkwang Moon, Ryota Shioya, Masahiro Goshima, Shuichi Sakai (Univ. of Tokyo.) CPSY2009-29 |
As the information society is evolved continuously, the distribution of data is increasing via internet. However, some o... [more] | CPSY2009-29 pp.13-18 |
| CPSY, DC (Joint) |
2009-08-04 - 2009-08-05 |
Miyagi | Exploratory evaluation of a clocking scheme with relaxed timing constraint Takanobu Kita (Univ. of Tokyo), Shou Tarui (Hitachi Ltd.), Ryota Shioya (Univ. of Tokyo/Research Fellowship for Young Scientists DC), Masahiro Goshima, Shuichi Sakai (Univ. of Tokyo) CPSY2009-20 |
The feature size of LSI is getting smaller year by year, increasing random variation between the elements. These days, t... [more] | CPSY2009-20 pp.61-66 |
|
| ICD, IPSJ-ARC | 2008-05-13 09:30 |
Tokyo | Speculation scheme that continues executing mispredicted instructions Takanobu Kita, Ryota Shioya, Hidetsugu Irie, Masahiro Goshima, Shuichi Sakai (Univ. of Tokyo) |
Modern processors are acquiring deeper pipelines as their clock frequencies grow higher,leading to large misprediction p... [more] | ICD2008-18 pp.7-12 |
|
| ICD, IPSJ-ARC | 2008-05-13 10:00 |
Tokyo | Evaluation of Area-Oriented Register Cache Ryota Shioya (Univ. Tokyo), Hidetsugu Irie (JST), Masahiro Goshima, Shuichi Sakai (Univ. Tokyo) |
Register file is one of the most costly units in recent superscalar processor. In this paper, we evaluate Area-oriented ... [more] | ICD2008-19 pp.13-18 |
|
| DC, CPSY | 2008-04-23 11:00 |
Tokyo | Tokyo Univ. | A Lightweight Write Error Detection for Register-file Using Improved Passive WAB Hidetsugu Irie, Ken Sugimoto, Ryota Shioya (U-Tokyo), Kenichi Watanabe (Hitachi), Masahiro Goshima, Shuichi Sakai (U-Tokyo) CPSY2008-3 DC2008-3 |
Recently, it has been getting inefficient to design microprocessors with worst-case margins because of increasing proces... [more] | CPSY2008-3 DC2008-3 pp.13-18 |
| DC, CPSY, IPSJ-SLDM, IPSJ-EMB | 2008-03-27 10:30 |
Kagoshima | String-Aware Information Flow Tracking to Detect Injection Attacks Satoshi Katsunuma, Ryota Shioya (Univ. of Tokyo), Hidetsugu Irie (JST), Masahiro Goshima, Shuichi Sakai (Univ. of Tokyo) DC2007-88 CPSY2007-84 |
High-level injection attacks, which exploit SQL injection and cross-site scripting, have a significant effect on compute... [more] | DC2007-88 CPSY2007-84 pp.25-30 |
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