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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC
(Joint) [detail]		 2007-11-20
15:35		 Fukuoka Kitakyushu International Conference Center A Study of Conection Block Structure and Implementation Methods of Multi-Input Functions for Variable Grain Logic Cell
Kazunori Matsuyama, Ryoichi Yamaguchi, Yoshiaki Satou, Hiroshi Miura, Masahiro Koga, Kazuki Inoue, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2007-33		 Since VGLC(Variable Grain Logic Cell) has a feature set both coarse-grained and fine-grained
types, its structure can ... [more]		 RECONF2007-33
pp.7-12
RECONF 2007-05-17
16:10		 Ishikawa Kanazawa Bunka Hall Performance Evaluation of Variable Grain Logic Cell for Arithmetic Circuits
Yoshiaki Satou, Motoki Amagasaki, Ryoichi Yamaguchi, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2007-7		 Reconfigurable logic devices are classified into two type of logic block, which are coarse-grain and fine-grain by the b... [more] RECONF2007-7
pp.37-42
RECONF, CPSY, VLD, DC, IPSJ-SLDM, IPSJ-ARC
(Joint) [detail]		 2006-11-30
15:50		 Fukuoka Kitakyushu International Conference Center Delay optimized technology mapping for Variable Grain Logic Cell
Hideaki Nakayama, Ryoichi Yamaguchi, Motoki Amagasaki, Kazunori Matsuyama, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) 		 [more] RECONF2006-55
pp.67-72
RECONF 2006-05-18
11:00		 Miyagi TOHOKU UNIVERSITY A Study of Mapping Method for Variable Grain Logic Cell Architecture
Ryoichi Yamaguchi, Kazunori Matsuyama, Hideaki Nakayama, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) 		 [more] RECONF2006-1
pp.1-6
 Results 1 - 4 of 4  /   
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