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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ITE-HI, IE, ITS, ITE-MMS, ITE-ME, ITE-AIT [detail] | 2020-02-28 15:25 |
Hokkaido | Hokkaido Univ. (Cancelled but technical report was issued) |
Make Your Presentation Better: Oral Presentation Support System using Linguistic and Acoustic Features Shengzhou Yi (UTokyo), Takuya Yamamoto, Osamu Yamamoto, Yukiyoshi Katsumizu, Hiroshi Yumoto (P&I), Xueting Wang, Toshihiko Yamasaki (UTokyo)  ITS2019-53 IE2019-91 |
In order to help presenters to improve their oral presentation skills, we propose a support system to provide impression... [more] | ITS2019-53 IE2019-91 pp.317-322 |
| RCS, IN (Joint) |
2015-05-22 15:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Receiver Diversity Performance for VHF Broadband Mobile Communications Hideki Kobayashi (NICT/National Police Academy), Hirokazu Sawada, Tomoshige Kan, Masayuki Oodo, Hiroshi Harada, Fumihide Kojima, Hiroyuki Yano (NICT), Noriyuki Soma, Masafumi Moriyama, Osamu Yamamoto, Takaaki Yamato, Shigeki Yamamoto (National Police Academy) RCS2015-44 |
In this report, a receiver diversity performance at base station for a VHF-band broadband mobile communication system is... [more] | RCS2015-44 pp.113-118 |
| CPM, EE | 2010-02-01 10:50 |
Kyoto | [Invited Talk]
Lithium/Air battery using aqueous electrolyte Yasuo Takeda, Nobuyuki Imanishi, Osamu Yamamoto (Mie Univ.) EE2009-59 CPM2009-151 |
Lithium/Air battery using aqueous electrolyte is studied. To avoid direct contact of lithium with water, water-stable NA... [more] | EE2009-59 CPM2009-151 pp.23-28 |
|
| SIS | 2008-06-13 12:50 |
Hokkaido | Application of the massively parallel embedded processor (MX) to real-time image processing Hiroyuki Yamasaki, Takeaki Sugimura, Hideyuki Noda, Osamu Yamamoto, Yoshihiro Okuno, Kazutami Arimoto (Renesas) SIS2008-20 |
We developed the massively parallel embedded processor core (MX core) for the SoC(System on Chip) building in as an acce... [more] | SIS2008-20 pp.33-38 |
|
| ICD, IPSJ-ARC | 2008-05-14 09:30 |
Tokyo | Design and Evaluation of a Heterogeneous Multicore SoC with 9 CPUs and 2 Matrix Processors Masami Nakajima, Koichi Ishimi, Naoto Okumura, Norio Masui, Osamu Yamamoto, Hiroyuki Kondo (Renesas) ICD2008-26 |
A multicore SoC has been developed for various applications (recognition, inference, measurement, control and security) ... [more] | ICD2008-26 pp.45-50 |
|
| CPSY | 2007-10-25 13:40 |
Kumamoto | Kumamoto University | The program development method of the massively parallel processor based on the matrix architecture. Hiroyuki Yamasaki, Katsuya Mizumoto, Hideyuki Noda, Tetsu Nishijima, Kanako Yoshida, Takeaki Sugimura, Takashi Kurafuji, Osamu Yamamoto, Yoshihiro Okuno, Kazutami Arimoto (Renesas) CPSY2007-25 |
Recently, the installed applications in the digital devices has been remarkably progressed. Considering these background... [more] | CPSY2007-25 pp.7-12 |
| RECONF | 2005-05-13 14:30 |
Kyoto | Kyoto University | A high-speed real number computation using simple SIMD operations Hiroyuki Yamasaki, Masahiro Iida (Kumamoto Univ.), Katsuya Mizumoto, Osamu Yamamoto (Renesas), Toshinori Sueyoshi (Kumamoto Univ.) |
We research the speed-up of application in the embedded system with consideration of cost and power consumption. This p... [more] |
RECONF2005-23 pp.49-54 |
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