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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, IPSJ-ARC 2007-05-31
14:15
Kanagawa   A 4320MIPS Four-Processor Core SMP/AMP with Individually Managed Clock Frequency for Low Power Consumption
Kiyoshi Hayase, Yutaka Yoshida, Tatsuya Kamei, Shinichi Shibahara, Osamu Nishii, Toshihiro Hattori, Atsushi Hasegawa (Renesas technology), Masashi Takada, Naohiko Irie, Kunio Uchiyama, Toshihiko Odaka (Hitachi Ltd.), Kiwamu Takada (Hitachi ULSI Systems Co. Ltd.), Keiji Kimura, Hironori Kasahara (Waseda Univ.) ICD2007-22
4320MIPS 4-processor SoC that provides with low power consumption and high performance was designed using 90nm process. ... [more] ICD2007-22
pp.31-35
SIP, ICD, IE, IPSJ-SLDM 2005-10-21
10:10
Miyagi Ichinobo, Sakunami-Spa Development of an embedded processor core SH-X2
Takashi Okada (Hitachi), Tomoichi Hayashi, Takehiro Shimizu (Renesas), Fumio Arakawa, Tetsuya Yamada (Hitachi), Osamu Nishii, Toshihiro Hattori (Renesas)
A {S}uper{H$^{\rm TM}$} embedded processor core, SH-X2 for consumer appliances, implemented in a 90-nm CMOS process runn... [more] SIP2005-118 ICD2005-137 IE2005-82
pp.19-24
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