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Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 20件中 1~20件目  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2016-10-26
15:30
Miyagi Niche, Tohoku Univ. [Invited Talk] Back-Bias Control Technique for Suppression of Die-to-Die Delay Variability of SOTB CMOS Circuits at Ultralow-Voltage (0.4 V) Operation
Hideki Makiyama, Yoshiki Yamamoto, Takumi Hasegawa, Shinobu Okanishi, Keiichi Maekawa, Hiroki Shinkawata, Shiro Kamohara, Yasuo Yamaguchi (Renesas Electronics Corp.), Nobuyuki Sugii (Hitach), Koichiro Ishibashi (The Univ. of Electro-Communications), Tomoko Mizutani, Toshiro Hiramoto (The Univ. of Tokyo)
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] SDM2016-71
pp.15-20
SDM 2016-10-26
16:10
Miyagi Niche, Tohoku Univ. [Invited Talk] Ultralow-Voltage Operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM Down to 0.37 V Utilizing Adaptive Back Bias
Yoshiki Yamamoto, Hideki Makiyama, Takumi Hasegawa, Shinobu Okanishi, Keiichi Maekawa, Shinkawata Hiroki, Shiro Kamohara, Yasuo Yamaguchi (Renesas), Nobuyuki Sugii (Hitachi), Tomoko Mizutani, Toshiro Hiramoro (UT)
We demonstrated record 0.37V minimum operation voltage (VMIN) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks... [more] SDM2016-72
pp.21-25
SDM, ICD 2015-08-24
13:35
Kumamoto Kumamoto City [Invited Talk] Atom-Switch-Based Programmable Logic Array and ROM
Yukihide Tsuji, X Bai, Makoto Miyamura, Toshitsugu Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi (NEC), Nobuyuki Sugii (Hitachi), Hiromitsu Hada (NEC)
We have proposed Nonvolatile Programmable Logic (NPL) and ROM using atom switch. Atom switch has unique properties, such... [more] SDM2015-61 ICD2015-30
pp.19-24
SDM, ICD 2015-08-25
10:55
Kumamoto Kumamoto City [Invited Talk] Novel Single p+Poly-Si/Hf/SiON Gate Stack Technology on Silicon-on-Thin-Buried-Oxide (SOTB) for Ultra-Low Leakage Applications
Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (Renesas Electronics Corp.), Nobuyuki Sugii (Hitachi), Tomoko Mizutani, Masaharu Kobayashi, Toshiro Hiramoto (UT)
We demonstrate a cost effective 65-nm SOTB CMOS technology for ultra-low leakage applications. Novel single p+poly-Si/Hf... [more] SDM2015-67 ICD2015-36
pp.53-57
SDM 2014-10-17
14:30
Miyagi Niche, Tohoku Univ. [Invited Talk] Back-Bias Control technique for Suppression of Die-to-Die Delay Variability of SOTB MOS Circuits at Ultralow-Voltage (0.4 V) Operation
Hideki Makiyama, Yoshiki Yamamoto, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii, Yasuo Yamaguchi (LEAP), Koichiro Ishibashi (Univ. of Electro-Communications), Tomoko Mizutani, Toshiro Hiramoto (Univ. of Tokyo)
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] SDM2014-94
pp.61-68
ICD, SDM 2014-08-04
09:00
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA Sleep Current using Reverse-Body-Bias Assisted 65nm SOTB CMOS Technology
Koichiro Ishibashi (UEC), Nobuyuki Sugii (LEAP), Kimiyoshi Usami (SIT), Hideharu Amano (KU), Kazutoshi Kobayashi (KIT), Cong-Kha Pham (UEC), Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Yasuo Yamaguchi, Hidekazu Oda, Takumi Hasegawa, Shinobu Okanishi, Hiroshi Yanagita (LEAP)
 [more] SDM2014-62 ICD2014-31
pp.1-4
ICD, SDM 2014-08-05
09:50
Hokkaido Hokkaido Univ., Multimedia Education Bldg. Statistical Analysis of Minimum Operation Voltage (Vmin) in Fully Depleted Silicon-on-Thin-BOX (SOTB) SRAM Cells
Tomoko Mizutani (Univ. of Tokyo), Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii (LEAP), Toshiro Hiramoto (Univ. of Tokyo)
The minimum operation voltage (Vmin) of fully depleted (FD) silicon-on-thin-BOX (SOTB) SRAM cells are measured and stati... [more] SDM2014-72 ICD2014-41
pp.55-58
ICD 2014-04-18
09:55
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] Ultralow-Voltage Operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM Down to 0.37 V Utilizing Adaptive Back Bias
Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii, Yasuo Yamaguchi (LEAP), Tomoko Mizutani, Toshiro Hiramoto (UTokyo)
We demonstrated record 0.37V minimum operation voltage (VMIN) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks... [more] ICD2014-11
pp.53-57
SDM 2014-01-29
14:40
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Suppression of Die-to-Die Delay Variability of Silicon on Thin Buried Oxide (SOTB) CMOS Circuits by Balanced P/N Drivability Control with Back-Bias for Ultralow-Voltage (0.4 V) Operation
Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Koichiro Ishibashi (Univ. of Electro- Comm.), Tomoko Mizutani, Toshiro Hiramoto (Univ. of Tokyo), Yasuo Yamaguchi (LEAP)
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] SDM2013-143
pp.35-38
SDM, ICD 2013-08-02
09:25
Ishikawa Kanazawa University Reduced Cell Current Variability in Fully Depleted Silicon-on-Thin-BOX (SOTB) SRAM Cells at Supply Voltage of 0.4V
Tomoko Mizutani (Univ. of Tokyo), Yoshiki Yamamoto, Hideki Makiyama, Hirofumi Shinohara, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Toshiro Hiramoto (Univ. of Tokyo)
Cell current (ICELL) variability in 6T-SRAM composed of silicon-on-thin-BOX (SOTB) MOSFETs by 65nm technology is measure... [more] SDM2013-75 ICD2013-57
pp.47-52
ICD, SDM 2012-08-02
13:00
Hokkaido Sapporo Center for Gender Equality, Sapporo, Hokkaido [Invited Lecture] Silicon on Thin Buried Oxide (SOTB) Technology for Ultralow-Power (ULP) Applications
Nobuyuki Sugii, Toshiaki Iwamatsu, Yoshiki Yamamoto, Hideki Makiyama, Takaaki Tsunomura, Hirofumi Shinohara, Hideki Aono, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (LEAP/Renesas), Tomoko Mizutani, Toshiro Hiramoto (IIS, The University of Tokyo)
Needs for low-power CMOS devices are still increasing. Ultralow-voltage-operation (ULV) CMOS with maximum power efficien... [more] SDM2012-68 ICD2012-36
pp.29-32
ICD, SDM 2012-08-02
13:25
Hokkaido Sapporo Center for Gender Equality, Sapporo, Hokkaido Reduced Drain Current Variability in Fully Depleted Silicon-on-Thin-BOX (SOTB) MOSFETs
Tomoko Mizutani (Univ. of Tokyo), Yoshiki Yamamoto, Hideki Makiyama, Takaaki Tsunomura, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Toshiro Hiramoto (Univ. of Tokyo)
Drain current variability in silicon-on-thin-BOX (SOTB) MOSFETs by 65nm technology is analyzed and compared with convent... [more] SDM2012-69 ICD2012-37
pp.33-36
SDM, ED
(Workshop)
2012-06-29
09:45
Okinawa Okinawa Seinen-kaikan [Invited Talk] Silicon on Thin Buried Oxide (SOTB) Technology for Ultralow-Power (ULP) Applications
Nobuyuki Sugii, Toshiaki Iwamatsu, Yoshiki Yamamoto, Hideki Makiyama, Takaaki Tsunomura, Hirofumi Shinohara, Hideki Aono, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (LEAP/Renesas), Tomoko Mizutani, Toshiro Hiramoto (IIS, Univ. of Tokyo)
Needs for low-power CMOS devices are still increasing. Ultralow-voltage-operation CMOS with maximum power efficiency can... [more]
SDM 2012-06-21
16:35
Aichi VBL, Nagoya Univ. Interface controlled silicide Schottky S/D for future 3D devices
Yuta Tamura, Ryo Yoshihara, Kuniyuki Kakushima, Parhat Ahmet, Yoshinori Kataoka, Akira Nishiyama, Nobuyuki Sugii, Kazuo Tsutsui, Kenji Natori, Takeo Hattori, Hiroshi Iwai (Tokyo Tech)
This paper presents Ni/Si stacked-structure as interface control for silicidation. An atomically flat $NiSi_2$ film inte... [more] SDM2012-59
pp.87-92
SDM 2011-07-04
09:00
Aichi VBL, Nagoya Univ. High Temperature Annealing with MIPS Structure for Improving Interfacial Property at La-silicate/Si Interface and Achieving Scaled EOT
Takamasa Kawanago, Kuniyuki Kakushima, Parhat Ahmet, Kazuo Tsutsui, Akira Nishiyama, Nobuyuki Sugii, Kenji Natori, Takeo Hattori, Hiroshi Iwai (Tokyo Tech.)
This paper reports our experimental study for further EOT scaling with small interface state density based on controllin... [more] SDM2011-50
pp.1-5
SDM 2011-07-04
10:00
Aichi VBL, Nagoya Univ. Defect analysis of HfO2/In0.53Ga0.47As interface using capacitance-voltage and conductance methods
Darius Zade, Ryuji Hosoi, Ahmet Parhat, Kuniyuki Kakushima, Kazuo Tsutsui, Akira Nishiyama, Nobuyuki Sugii, Kenji Natori, Takeo Hattori, Hiroshi Iwai (Tokyo Inst. of Tech.)
The changes in electrical characteristics of W/HfO2or La2O3/ In0.53Ga0.47As capacitors by wet chemical treatment before ... [more] SDM2011-53
pp.17-22
SDM 2010-06-22
10:45
Tokyo An401・402 Inst. Indus. Sci., The Univ. of Tokyo Nickel silicide Encroachment in Silicon Nanowire and its Suppression
Naoto Shigemori, Soshi Sato, Kuniyuki Kakushima, Parhat Ahmet, Kazuo Tsutsui, Akira Nishiyama, Nobuyuki Sugii, Kenji Natori, Takeo Hattori, Hiroshi Iwai (Tokyo Inst. of Tech.)
Ni silicide in the Si Nanowire shows a reaction different from the reaction with the bulk substrate from the influence o... [more] SDM2010-36
pp.17-22
SDM 2010-06-22
13:45
Tokyo An401・402 Inst. Indus. Sci., The Univ. of Tokyo High Temperature Rapid Thermal Annealing of Rare-Earth Oxides Dielectrics for Highly Scaled Gate Stack of EOT=0.5 nm
Daisuke Kitayama, Tomotsune Koyanagi, Kuniyuki Kakushima, Parhat Ahmet, Kazuo Tsutsui, Akira Nishiyama, Nobuyuki Sugii, Kenji Natori, Takeo Hattori, Hiroshi Iwai (Tokyo Inst. of Tech.)
A direct contact of high-k/Si substrate (without SiO<sub>2</sub> interfacial layer structure) is required for achieving ... [more] SDM2010-41
pp.43-48
SDM 2007-06-08
11:20
Hiroshima Hiroshima Univ. ( Faculty Club) Effects of Nitrogen Incorporaton into La2O3 using Nitrogen Radicals
Soshi Sato, Kiichi Tachi, Jaeyeol Song, Kuniyuki Kakushima, Parhat Ahmet, Kazuo Tsutsui, Nobuyuki Sugii, Takeo Hattori, Hiroshi Iwai (Tokyo Tech.)
This work reports the influence of nitridation on structural and electrical properties of La2O3 gate dielectric films. T... [more] SDM2007-44
pp.71-74
ICD, SDM 2006-08-18
09:50
Hokkaido Hokkaido University Parameter and Random Dopant Fluctuation on Fully-Depleted SOI MOSFETs with a Very Thin BOX
Tetsu Ohtou (Univ. Tokyo), Nobuyuki Sugii (R&D Group, Hitachi, Ltd.,), Toshiro Hiramoto (Univ. Tokyo)
 [more] SDM2006-144 ICD2006-98
pp.111-114
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