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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 7 of 7  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, IPSJ-ARC, IPSJ-EMB 2009-01-14
13:45
Osaka Shoushin Kaikan Fine-Grained Dynamic Sleep Control on the Combination of High-Perfomance Cores and Low-Power Cores
Naomi Seki, Lei Zhao, Daisuke Ikebuchi, Yu Kojima, Hideharu Amano (Keio Univ)
 [more] ICD2008-143
pp.81-86
ICD, IPSJ-ARC 2008-05-14
15:30
Tokyo   A Fine Grain Dynamic Sleep Control Scheme in Superscalar Processor
Yu Kojima, Daisuke Ikebuchi, Naomi Seki, Yohei Hasegawa, Hideharu Amano (Keio Univ.), Toshihiro Kashima, Seidai Takeda, Toshiaki Shirai, Mitsutaka Nakata, Kimiyoshi Usami (Shibaura Inst of Tech), Tetsuya Sunada, Jun Kanai, Mitaro Namiki (Tokyo Univ. of Agri & Tech), Masaaki Kondo, Hiroshi Nakamura (Univ. of Tokyo)
Geyser-0 is a low power MIPS R3000 processor which uses a novel fine grain power gating technique to computational units... [more] ICD2008-33
pp.87-92
RECONF, CPSY, VLD, IPSJ-SLDM 2008-01-16
15:10
Kanagawa Hiyoshi Campus, Keio University Development of verification and power estimation methodology for circuits with Run Time Power Gating
Mitsutaka Nakata, Toshiaki Shirai, Toshihiro Kashima, Seidai Takeda, Kimiyoshi Usami (S.I.T.), Naomi Seki, Yohei Hasegawa, Hideharu Amano (Keio Univ.) VLD2007-111 CPSY2007-54 RECONF2007-57
When applying Run-Time Power Gating (RTPG) to a design,logic verification is one of the major problems.Gate-level simula... [more] VLD2007-111 CPSY2007-54 RECONF2007-57
pp.37-42
RECONF, CPSY, VLD, IPSJ-SLDM 2008-01-16
15:35
Kanagawa Hiyoshi Campus, Keio University Physical design and Evaluation of MIPS R3000 processor applying Run Time Power Gating
Toshiaki Shirai, Toshihiro Kashima, Seidai Takeda, Mitsutaka Nakata, Kimiyoshi Usami (S.I.T.), Yohei Hasegawa, Naomi Seki, Hideharu Amano (Keio Univ.) VLD2007-112 CPSY2007-55 RECONF2007-58
Run Time Power Gating (RTPG) is a technology that reduces leakage power in a temporally/spatially fine-grained manner. T... [more] VLD2007-112 CPSY2007-55 RECONF2007-58
pp.43-48
ICD, IPSJ-ARC 2007-05-31
16:45
Kanagawa   A fine grain dynamic sleep control scheme in MIPS R3000
Naomi Seki, Yohei Hasegawa, Hideharu Amano (Keio Univ.), Naoaki Ohkubo, Seidai Takeda, Toshihiro Kashima, Toshiaki Shirai, Kimiyoshi Usami (Shibaura Inst. Tech.), Masaaki Kondo, Hiroshi Nakamura (U. of Tokyo)
 [more] ICD2007-25
pp.49-54
VLD, CPSY, RECONF, IPSJ-SLDM 2007-01-18
13:50
Tokyo Keio Univ. Hiyoshi Campus Implementation of Dynamically Reconfigurable Processor MuCCRA
Takuro Nakamura, Yohei Hasegawa, Satoshi Tsutsumi, Hiroki Matsutani, Vasutan Tunbunheng, Adepu Parimala, Takashi Nishimura, Masaru Kato, Shotaro Saito, Toru Sano, Naomi Seki, Keiichiro Hirai, Mao KaiYi, Hideharu Amano (Keio Univ.)
 [more] VLD2006-101 CPSY2006-72 RECONF2006-72
pp.43-48
VLD, CPSY, RECONF, IPSJ-SLDM 2007-01-18
14:15
Tokyo Keio Univ. Hiyoshi Campus A Scheduling Algorithm for Multicast Configuration
Satoshi Tsutsumi, Vasutan Tunbunheng, Yohei Hasegawa, Hiroki Matsutani, Adepu Parimala, Takuro Nakamura, Takashi Nishimura, Toru Sano, Masaru Kato, Shotaro Saito, Naomi Seki, Keiichiro Hirai, Mao KaiYi, Hideharu Amano (Keio Univ.)
 [more] VLD2006-102 CPSY2006-73 RECONF2006-73
pp.49-54
 Results 1 - 7 of 7  /   
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