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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF 2009-09-18
13:10
Tochigi Utsunomiya Univ. High-density Implementation for Reconfigurable Device MPLD
Hiroaki Toguchi, Masanori Asaeda, Yutaro Oda, Naoki Hirakawa, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.), Masayuki Sato, Takashi Ishiguro (TAIYO YUDEN CO.LTD) RECONF2009-35
In recent years, a lot of Programmable Logic Device (PLD) such as Field Programmable Gate Array (FPGA) has been used. As... [more] RECONF2009-35
pp.97-102
CPSY 2008-10-31
11:15
Hiroshima Hiroshima City Univ. [Special Invited Talk] The Proposal of the MPLD Architecture for High Performance Computing
Tetsuo Hironaka, Naoki Hirakawa (Hiroshima City Univ.), Masanori Yoshihara (Hiroshima City Univ./Renesas Technorogy Corp.), Kazuya Tanigawa (Hiroshima City Univ.), Masayuki Sato (Taiyo Yuden Co., Ltd.) CPSY2008-31
As the practical use of high performance FPGA increases, research on using FPGAs in the field of HPC (High Performance C... [more] CPSY2008-31
pp.13-18
RECONF 2008-09-26
13:50
Okayama Okayama Univ. Consideration of Combinational Circuit Mapping Method for Reconfigurable Device MPLD
Yutaro Oda, Kazuya Tanigawa, Tetsuo Hironaka, Naoki Hirakawa, Hiroaki Toguchi (Hiroshima City Univ.), Masayuki Sato (Taiyo Yuden) RECONF2008-37
As a novel Field Programmable Gate Array(FPGA), MPLD has been proposed. The MPLD consists of MLUTs. which has functions ... [more] RECONF2008-37
pp.87-92
RECONF 2007-09-20
13:30
Shiga Ritsumeikan Univ. Biwako Kusatsu Campus (Shiga) Implementation of Memory (MPLD) with The Ability to work as a Reconfigurable Device
Masanori Yoshihara, Naoki Hirakawa, Kazuya Tanigawa, Tetsuo Hironaka (HCU), Masayuki Sato (GTI) RECONF2007-16
In recent years, FPGAs have been used as a reconfigurable device.As a problem of FPGAs, we cannot use FPGAs as one large... [more] RECONF2007-16
pp.7-12
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