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Committee Date Time Place Paper Title / Authors Abstract Paper #
IPSJ-SLDM, CPSY, RECONF, VLD [detail] 2014-01-28
09:45		 Kanagawa Hiyoshi Campus, Keio University a discussion on hardware architecture of SIFT algorithm for FPGAs utilizing a high-level synthesis tool
Naohisa Arakawa, Lin Meng, Tomonori Izumi (Ritsumeikan Univ.) VLD2013-105 CPSY2013-76 RECONF2013-59		  [more] VLD2013-105 CPSY2013-76 RECONF2013-59
pp.19-24
CPSY, VLD, RECONF, IPSJ-SLDM [detail] 2013-01-17
13:00		 Kanagawa   A design of a line buffer module for image proccessing as a library of a high-level synthesis environment
Naohisa Arakawa, Tomonori Izumi (Ritsumeikan Univ.) VLD2012-129 CPSY2012-78 RECONF2012-83		  [more] VLD2012-129 CPSY2012-78 RECONF2012-83
pp.129-134
RECONF 2012-05-30
11:50		 Okinawa Tiruru (Naha Okinawa, Japan) A Hardware Implementation and an FPGA Prototyping of a Connect-6 Player Algorithm Using Impulse-C
Naohisa Arakawa, Tomonori Izumi (Ritsumeikan Univ.) RECONF2012-23		  [more] RECONF2012-23
pp.131-136
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