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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, IPSJ-SLDM 2013-05-16
16:25
Fukuoka Kitakyushu International Conference Center SoC System Design Methodology with Fully-Coherent Cache
Kodai Moritaka (NAIST), Hiroaki Yoshida, Mitsuru Tomono (FLA), Yasuhiko Nakashima (NAIST) VLD2013-10
As Chip Multi-Processors (CMPs) includes more processor cores in a single chip, the impact of its memory model on the en... [more] VLD2013-10
pp.73-78
VLD, IPSJ-SLDM 2006-05-11
14:00
Ehime Ehime University Online FPGA Placement Using I/O Routing Information
Mitsuru Tomono, Masaki Nakanishi, Shigeru Yamashita (NAIST), Kazuo Nakajima (Univ. of Maryland), Katsumasa Watanabe (NAIST)
 [more] VLD2006-1
pp.1-6
RECONF 2005-12-02
09:55
Fukuoka Kitakyushu International Conference Center Online FPGA Placement under I/O Timing Constraints
Mitsuru Tomono, Masaki Nakanishi, Shigeru Yamashita, Katsumasa Watanabe (NAIST)
In recent years, FPGAs are effectively-utilized in various fields.
Among them, devices with partial reconfiguration are... [more]
RECONF2005-73
pp.7-12
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