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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, ITE-IST 2015-07-03
14:20
Kanagawa National Defense Academy [Invited Talk] Circuit Design Techniques for Low Power Energy Harvesting System -- Efficient DC-DC Boost Converter and Ultra-Low Power Digital Circuits --
Mitsuji Okada, Yuzuru Shizuku, Tetsuya Hirose (Kobe Univ.) ICD2015-22
In this paper, we present the circuit design techniques for an efficient DC-DC boost converter, a MPPT (Maximum Power Po... [more] ICD2015-22
pp.47-52
ICD, ITE-IST 2010-07-22
15:50
Osaka Josho Gakuen Osaka Center [Invited Talk] A 2.1-to-2.8-GHz Low-Phase-Noise All-Digital Frequency Synthesizer with a Time-Windowed Time-to-Digital Converter
Tadashi Maeda, Takashi Tokairin (Renesas Electronics Corporation), Masaki Kitsunezuka (NEC Corp.), Mitsuji Okada (Renesas Electronics Corporation), Muneo Fukaishi (NEC Corp.) ICD2010-29
A 2.1-to-2.8-GHz low-power consumption all-digital phase locked loop (ADPLL) with a time-windowed time-to-digital conver... [more] ICD2010-29
pp.49-54
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