IEICE Technical Committee Submission System
Conference Schedule		 Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 7 of 7  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2019-11-07
15:20		 Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Compact Modeling Perspective -- Bridge to Industrial Applications --
Mitiko Miura-Mattausch (HU) SDM2019-72		 This paper gives an overview about compact-model development history, which is undertaking the evolution as a bridge bet... [more] SDM2019-72
pp.17-20
SDM 2010-11-12
14:15		 Tokyo Kikai-Shinko-Kaikan Bldg. Modeling of 2D Bias Control in Overlap Region of High-Voltage MOSFETs
Akihiro Tanaka, Yasunori Oritsuki, Hideyuki Kikuchihara, Masataka Miyake, Hans Juergen Mattausch, Mitiko Miura-Mattausch (Hiroshima Univ.), Yong Liu, Keith Green (TI) SDM2010-181		 High-voltage MOSFETs have been applied in a wide range of bias voltages from a few volts up to several hundred volts by ... [more] SDM2010-181
pp.53-57
SDM 2009-11-12
11:00		 Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Compact MOSFET Model and Its Perspective -- from bulk-MOSFET to MG-MOSFET --
Mitiko Miura-Mattausch, Masataka Miyake, Koh Johguchi, Shunta Kusu, Kenta Ishimura, Hideyuki Kikuchihara, Feldmann Uwe, Mattausch Hans Juergen (Hiroshima Univ.) SDM2009-135		  [more] SDM2009-135
pp.1-6
SDM 2009-11-12
15:05		 Tokyo Kikai-Shinko-Kaikan Bldg. HiSIM-IGBT: A Compact IGBT Model for Circuit Simulation
Masataka Miyake, Hiroki Masuoka, Uwe Feldmann, Mitiko Miura-Mattausch (Hiroshima Univ.) SDM2009-139		 HiSIM-IGBT, a compact IGBT (Insulated Gate Bipolar Transistor) model for circuit simulation has been developed. The mode... [more] SDM2009-139
pp.23-27
ICD, SDM 2008-07-17
11:20		 Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Progress of compact model for CMOS circuit design -- Performance of HiSIM model based on the surface potential model --
Tatsuya Ohguro (Hiroshima Univ./Toshiba), Mitiko Miura-Mattausch (Hiroshima Univ.) SDM2008-133 ICD2008-43		 HiSIM model based on the surface potential model has been popular because the model can accurately simulate analog and R... [more] SDM2008-133 ICD2008-43
pp.29-34
SDM, VLD 2007-10-31
15:25		 Tokyo Kikai-Shinko-Kaikan Bldg. Modeling of Floating-Body Effect in SOI-MOSFET with Complete Surface-Potential Description
Takahiro Murakami, Makoto Ando, Norio Sadachika (Hiroshima Univ.), Takaki Yoshida (NIS), Mitiko Miura-Mattausch (Hiroshima Univ.) VLD2007-68 SDM2007-212		  [more] VLD2007-68 SDM2007-212
pp.41-45
CAS, NLP 2007-10-18
16:00		 Tokyo Musashi Institute of Technology [Tutorial Invited Lecture] Advanced MOSFET Model for Cicuit Simulation -- From Meyer Model to Surface-Potential-Based Model --
Mitiko Miura-Mattausch (Hiroshima Univ.) CAS2007-50 NLP2007-78		  [more] CAS2007-50 NLP2007-78
pp.93-98
 Results 1 - 7 of 7  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

[Return to Top Page]

[Return to IEICE Web Page]
The Institute of Electronics, Information and Communication Engineers (IEICE), Japan