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Committee Date Time Place Paper Title / Authors Abstract Paper #
HWS, VLD 2019-02-27
15:20		 Okinawa Okinawa Ken Seinen Kaikan Design Flow of Circuits with Multiple Supply Voltages for Power Reduction in General-Synchronous Framework
Masataka Aoki, Yukihide Kohira (Univ. of Aizu) VLD2018-102 HWS2018-65		 In general-synchronous framework (g-frame), in which a clock is not assumed to be distributed to all registers simultane... [more] VLD2018-102 HWS2018-65
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