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Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 98件中 1~20件目  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-13
10:30
Ehime Ehime Prefecture Gender Equality Center Gate Level Netlist Function Classification Method Based on R-GCN
Yuichiro Fujishiro, Hiroki Oyama, Motoki Amagasaki, Masahiro Iida (Kumamoto Univ.), Hiroaki Yasuda, Hiroto Ito (MITSUBISHI ELECTRIC ENGINEERING)
 [more] VLD2019-30 DC2019-54
pp.7-12
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-14
10:05
Ehime Ehime Prefecture Gender Equality Center DNN accelerator for AI edge computing
Yasuhiro Nakahara, Juntaro Chikama, Motoki Amagasaki (Kumamoto Univ.), Zhao Qian (Kyutech), Masahiro Iida (Kumamoto Univ.)
 [more] RECONF2019-38
pp.15-20
RECONF 2019-09-20
14:00
Fukuoka KITAKYUSHU Convention Center Quantized Neural Networks Library for Exact Hardware Emulation
Masato Kiyama, Yasuhiro Nakahara, Motoki Amagasaki, Masahiro Iida (Kumamoto Univ.)
Deep neural networks (DNNs) have recently shown outstanding performance in many application domains.
However, it is dif... [more]
RECONF2019-33
pp.69-74
RECONF 2019-05-09
16:35
Tokyo Tokyo Tech Front A case study of an FPGA implementation for streaming data filtering
Hiroki Nakagawa, Yasutaka TsuTsumi, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)
With the spread of IoT (Internet of Things) equipment in recent years, collection of big data becomes easy, and the dema... [more] RECONF2019-8
pp.41-46
RECONF 2019-05-10
13:55
Tokyo Tokyo Tech Front Deep Learning Framework with Numerical Precision
Masato Kiyama, Motoki Amagasaki, Masahiro Iida (Kumamoto Univ.)
 [more] RECONF2019-15
pp.79-84
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2018-12-05
14:15
Hiroshima Satellite Campus Hiroshima Basic Evaluation of Netlist Function Inference using GCN
Hiroki Oyama, Motoki Amagasaki, Masahiro Iida (kumamoto Univ.), Hiroaki Yasuda, Hiroto Ito (MITSUBISHI ELECTRIC ENGINEERING)
In recent years, Recently GCN studies on graphs has been conducted.GCN is a kind of deep learning and classifies network... [more] VLD2018-44 DC2018-30
pp.31-36
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2018-12-06
09:00
Hiroshima Satellite Campus Hiroshima Resources Utilization of Fine-grained Overlay Architecture
Theingi Myint (Kumamoto), Qian Zhao (Kyutech), Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto)
This paper focuses on utilization of hardware resources for fine-grained overlay architecture. Overlay architectures inc... [more] RECONF2018-37
pp.15-20
RECONF 2018-09-17
14:30
Fukuoka LINE Fukuoka Cafe Space A Case Study on Complex Event Processing over low cost ARM+FPGA Boards.
Hendarmawan (Kumamoto University), Qian Zhao (Kyutech), Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto University)
 [more] RECONF2018-21
pp.13-18
RECONF 2018-09-18
15:15
Fukuoka LINE Fukuoka Cafe Space A case study of database filtering on streaming processing
Hiroki Nakagawa, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)
With the spread of IoT (Internet of Things) equipment in recent years, collection of big data becomes easy, and the dema... [more] RECONF2018-33
pp.79-84
IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] 2018-01-19
13:00
Kanagawa Raiosha, Hiyoshi Campus, Keio University FPGA accelerator of CNN using Power of 2 Approximation and Pruning weights
Takahiro Utsunomiya, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
Convolutional Neural Network (CNN), a method of Image recognition, is utilized in various fields. Field Programmable Gat... [more] VLD2017-82 CPSY2017-126 RECONF2017-70
pp.119-124
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2017-11-06
10:30
Kumamoto Kumamoto-Kenminkouryukan Parea hCODE 2.0: An Open-source Platform for FPGA Cluster System
Hiroki Nakagawa, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
In recent years, major cloud providers such as Amazon and Microsoft are improving cloud applications using FPGAs.
By in... [more]
VLD2017-27 DC2017-33
pp.1-6
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2017-11-06
13:25
Kumamoto Kumamoto-Kenminkouryukan Parea Graph processing has memory access with low locality, and it is not easy to process large-scale graphs which have the mi... [more] RECONF2017-38
pp.7-12
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2017-11-07
09:50
Kumamoto Kumamoto-Kenminkouryukan Parea Performance Evaluation Three Dimensional FPGA Architecture with Face-down Stacking
Keishiro Akashi, Motoki Amagasaki, Qian Zhao, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ)
In recent years,Three-dimensional (3D) field-programmable gate arrays(FPGAs) are expected to offer higher logic density ... [more] RECONF2017-42
pp.31-36
RECONF 2017-09-26
13:55
Tokyo DWANGO Co., Ltd. A case study of High-level Synthesis Using Higher-order Function on Functional Language
Takuya Teraoka, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)
The growing capabilities of silicon technology and the increasing complexity of applications in recent decades have forc... [more] RECONF2017-35
pp.75-80
RECONF, CPSY, DC, IPSJ-ARC
(Joint) [detail]
2017-05-22
16:20
Hokkaido Noboribetsu-Onsen Dai-ichi-Takimoto-Kan CNN implementation on FPGA with Power of 2 Approximation of Weight
Takahiro Utsunomiya, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
Convolutional Neural Network (CNN), a method of Image recognition, is utilized in various fields. Considering CNN implem... [more] RECONF2017-6
pp.25-30
RECONF, CPSY, DC, IPSJ-ARC
(Joint) [detail]
2017-05-22
17:10
Hokkaido Noboribetsu-Onsen Dai-ichi-Takimoto-Kan A proposal of Bit Serial Arithmetic Units for Arbitrary Precision
Tomonori Miura, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
In this paper,we propose a bit serial arithmetic unit for arbitrary precision.It calculates 1 digit ev- ery cycle from t... [more] RECONF2017-8
pp.37-41
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] 2017-01-23
15:20
Kanagawa Hiyoshi Campus, Keio Univ. Implementation of Multiple FPGAs with High Speed Serial Optical Interconnection
Futoshi Murase, Daichi Takagi, Motoki Amagasaki, Morihiro Kuga, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ)
We propose a multiple FPGA system using high speed optical serial interconnection for a inter-connection of FPGAs. In th... [more] VLD2016-75 CPSY2016-111 RECONF2016-56
pp.31-36
VLD, DC, CPSY, RECONF, CPM, ICD, IE
(Joint) [detail]
2016-11-29
10:55
Osaka Ritsumeikan University, Osaka Ibaraki Campus Development of power estimation tool for three dimensional FPGA
Masato Ikebe, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
Three-dimensional (3D) stacking technology is attractive for providing another way to improve the performance of the lar... [more] RECONF2016-46
pp.35-40
RECONF 2016-09-06
10:55
Toyama Univ. of Toyama A Study of Methodology and Tools for Open-source FPGA Accelerators
Takuya Nakamichi, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
Today's information and communication society requires more and higher-performance computing devices with the constraint... [more] RECONF2016-34
pp.45-50
VLD, IPSJ-SLDM 2016-05-11
13:50
Fukuoka Kitakyushu International Conference Center Multi bit soft error tolerant FPGA architecture
Yuji Nakamura, Takuya Teraoka, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
Due to reaching the nanoscale transistor size, effect of soft error to the memory has become conspicuous. In small devic... [more] VLD2016-3
pp.35-40
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