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Committee Date Time Place Paper Title / Authors Abstract Paper #
ISEC, IT, WBS 2008-02-29
09:20
Tokyo   Side Channel Attacks from Signal Lines of Cryptographic Modules -- Experiments for FPGA-Implemented AES --
Ryota Watanabe, Makoto Torikoshi, Yoshio Takahashi, Tsutomu Matsumoto (Yokohama National Univ.) IT2007-51 ISEC2007-148 WBS2007-82
 [more] IT2007-51 ISEC2007-148 WBS2007-82
pp.15-22
ISEC 2007-12-19
10:20
Tokyo Kikai-Shinko-Kaikan Bldg. How to design tables for power-analyses resistance of Table-network-based FPGA implementations of AES
Makoto Torikoshi, Yoshio Takahashi, Tsutomu Matsumoto (Yokohama National Univ.) ISEC2007-114
Differential power analyses are statistical cryptanalytic methods to estimate the value of hidden cryptographic keys ins... [more] ISEC2007-114
pp.11-18
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