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 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2012-11-28
10:30
Fukuoka Centennial Hall Kyushu University School of Medicine A LSI-Package-Board co-evaluation of Power noise in the Digital LSI
Kumpei Yoshikawa, Yuta Sasaki (Kobe Univ.), Kouji Ichikawa (DENSO), Yoshiyuki Saito (Panasonic), Makoto Nagata (Kobe Univ.) VLD2012-91 DC2012-57
Problems related with power noise in LSI system are getting prominent
because of the higher integration and lower $V_{d... [more]
VLD2012-91 DC2012-57
pp.183-188
EMCJ 2012-04-20
15:10
Ishikawa Kanazawa Univ. Integrated evaluation of on-board and on-chip power noise measurement results in digital LSI
Kumpei Yoshikawa, Yuta Sasaki (Kobe Univ.), Kouji Ichikawa (DENSO), Makoto Nagata (Kobe Univ.) EMCJ2012-7
In recent LSI system designs, noise environment of LSI system is getting worse.
Therefore proper noise oriented design ... [more]
EMCJ2012-7
pp.37-42
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-30
09:25
Miyazaki NewWelCity Miyazaki Measurements and Co-Simulation of On-Chip and On-Boad AC Power Noise in Digital Integrated Circuits
Kumpei Yoshikawa, Yuta Sasaki (Kobe Univ.), Kouji Ichikawa (DENSO), Yoshiyuki Saito (Panasonic), Makoto Nagata (Kobe Univ./CREST,JST) CPM2011-163 ICD2011-95
Power noise of an integrated circuit (IC) chip is dominantly characterized by the frequency-domain impedance of a chip-p... [more] CPM2011-163 ICD2011-95
pp.73-78
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-30
10:30
Miyazaki NewWelCity Miyazaki Immunity Evaluation of SRAM Core Using DPI with On-Chip Diagnosis Structures
Takuya Sawada, Taku Toshikawa, Kumpei Yoshikawa (Kobe Univ.), Hidehiro Takata, Koji Nii (Renesas Electronics Corp.), Makoto Nagata (Kobe Univ.) CPM2011-165 ICD2011-97
 [more] CPM2011-165 ICD2011-97
pp.85-90
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2010-11-29
10:40
Fukuoka Kyushu University Evaluation of frequency components of power noise in CMOS digital LSI
Kumpei Yoshikawa, Hiroshi Matsumoto, Yuta Sasaki (Kobe Univ.), Makoto Nagata (Kobe Univ./CREST-JST) CPM2010-124 ICD2010-83
Recent trends of electric devices are higher performance and/or lower power consumption.
To achieve these designs, LSI ... [more]
CPM2010-124 ICD2010-83
pp.1-6
ICD 2008-12-11
13:30
Tokyo Tokyo Inst. Tech., Ohokayama Campus, Kokusa-Kouryu-Kaikan [Poster Presentation] EMC analysis of LSI -- Evaluation and simulation of on-chip and on-board power supply noise --
Kumpei Yoshikawa, Makoto Nagata (Kobe Univ.) ICD2008-109
We have measured power supply noise waveforms by on-chip monitors, and power supply current spectrum on the PCB by a mag... [more] ICD2008-109
pp.43-46
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