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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ICD |
2024-04-12 09:30 |
Kanagawa |
(Primary: On-site, Secondary: Online) |
[Invited Talk]
High Density Dynamic Flash Memory (DFM) Koji Sakui (Unisantis) ICD2024-9 |
[more] |
ICD2024-9 pp.27-34 |
SDM |
2021-02-05 16:40 |
Online |
Online |
[Invited Talk]
Bumpless Build Cube (BBCube) using Wafer-on-Wafer (WOW) Technology with 3D Redundancy Scheme Shinji Sugatani, Norio Chujo, Koji Sakui, Hiroyuki Ryoson, Tomoji Nakamura, Takayuki Ohba (Titech) SDM2020-61 |
An application of vertically replaceable memory block architecture
scheme hereinafter referred to as “3D redundancy” fo... [more] |
SDM2020-61 pp.27-32 |
SDM, ED |
2009-06-24 16:30 |
Overseas |
Haeundae Grand Hotel, Busan, Korea |
Design of 30nm FinFET with Halo Structure Tetsuo Endoh, Koji Sakui, Yukio Yasuda (Tohoku Univ../JST-CREST) ED2009-64 SDM2009-59 |
Design of 30nm FinFETs with halo structure for suppressing the threshold voltage roll-off and improving the subthreshold... [more] |
ED2009-64 SDM2009-59 pp.63-66 |
SDM, ED |
2009-06-25 13:00 |
Overseas |
Haeundae Grand Hotel, Busan, Korea |
Sub-10 nm Multi-Nano-Pillar Type Vertical MOSFET Tetsuo Endoh, Koji Sakui, Yukio Yasuda (Tohoku Univ./JST-CREST) ED2009-90 SDM2009-85 |
The excellent performance of 10nm gate Multi-Nano-Pillar type (M-) Vertical MOSFET has been numerically shown for the fi... [more] |
ED2009-90 SDM2009-85 pp.173-176 |
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