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 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, SDM 2010-08-27
12:05
Hokkaido Sapporo Center for Gender Equality Study of stacked FeRAM using ITO channel
Koichi Sugano, Shigeyoshi Watanabe (Shonan Inst. of Tech) SDM2010-143 ICD2010-58
 [more] SDM2010-143 ICD2010-58
pp.105-110
ICD 2010-04-23
10:20
Kanagawa Shonan Institute of Tech. Design Technology of stacked NAND FeRAM
Koichi Sugano, Shigeyoshi Watanabe (Shonan Inst. of Tech.) ICD2010-13
 [more] ICD2010-13
pp.69-74
ICD 2009-12-14
13:30
Shizuoka Shizuoka University (Hamamatsu) [Poster Presentation] Design Technology of stacked NAND type 1-transistor FeRAM
Koichi Sugano, Shigeyoshi Watanabe (Shonan Inst. of Tech) ICD2009-80
 [more] ICD2009-80
pp.25-29
ICD, SDM 2009-07-17
09:30
Tokyo Tokyo Institute of Technology Study of stacked NAND type 1-transistor FeRAM
Koichi Sugano, Shigeyoshi Watanabe (Shonan Inst. of Tech.) SDM2009-108 ICD2009-24
 [more] SDM2009-108 ICD2009-24
pp.57-62
ICD 2009-04-14
15:25
Miyagi Daikanso (Matsushima, Miyagi) Reading method of NAND type 1-transistor FeRAM with pulse input
Koichi Sugano, Shigeyoshi Watanabe (Shonan Inst. of Tech.) ICD2009-11
 [more] ICD2009-11
pp.53-57
ICD, SDM 2008-07-18
14:15
Tokyo Kikai-Shinko-Kaikan Bldg. Realistic future trend of non-voltile semiconductor memory and feasibility study of ultra-low-cost high-speed universal non-volatile memory -- feasibility study of BiCS type FeRAM and MRAM --
Shigeyoshi Watanabe, Koichi Sugano, Shouto Tamai (Shonan Institute of Tech.) SDM2008-145 ICD2008-55
 [more] SDM2008-145 ICD2008-55
pp.97-102
 Results 1 - 6 of 6  /   
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