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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2023-09-14 16:40 |
Tokyo | Tokyo University of Agriculture and Technology Koganei campus (Primary: On-site, Secondary: Online) |
Implementation and Evaluation of a Hardware Accelerator using High-Speed Data Transfer with the Vector Register Sharing Mechanism Go Akamatsu, Tomoaki Tanaka (TUAT), Kiyofumi Tanaka (JAIST), Yasunori Osana (Kumamoto Univ.), Takefumi Miyoshi (Wasalabo), Jubee Tada (Yamagata Univ.), Hironori Nakajo (TUAT)  RECONF2023-24 |
Vector processors can load lots of data and perform operations in parallel. The Vector Register Sharing Mechanism, prop... [more] |
RECONF2023-24 pp.18-19 |
| RECONF | 2023-09-15 13:25 |
Tokyo | Tokyo University of Agriculture and Technology Koganei campus (Primary: On-site, Secondary: Online) |
Implementation and Evaluation of a Hardware Accelerator via Vector Register Sharing Mechanism for Massive Data Transfer Michiya Kato, Tomoaki Tanaka (TUAT), Kiyofumi Tanaka (JAIST), Yasunori Osana (Kumamoto Univ.), Takefumi MIyoshi (Wasarabo LLC), Jubee Tada (Yamagata Univ.), Hironori Nakajo (TUAT) RECONF2023-29 |
Vector Register Sharing Mechanism is a method of data transfer by connecting some of the vector registers in the vector ... [more] | RECONF2023-29 pp.40-45 |
| RECONF | 2022-06-07 14:50 |
Ibaraki | CCS, Univ. of Tsukuba (Primary: On-site, Secondary: Online) |
Vector Register Sharing Mechanism for Hardware Acceleration Tomoaki Tanaka, Ryousuke Higashi (TUAT), Kiyofumi Tanaka (JAIST), Yasunori Osana (Univ. of the Ryukyus), Takefumi Miyoshi (Wasalabo), Jubee Tada (Yamagata Univ.), Hironori Nakajo (TUAT) RECONF2022-5 |
In this paper, we present a vector register sharing mechanism that directly shares vector registers inside the processor... [more] | RECONF2022-5 pp.26-31 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-26 10:30 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | A Resource Sharing Method for Reconfigurable Systems with Java Virtual Machine
-- Programming in Instantiation -- Hitoki Ito, Kiyofumi Tanaka (JAIST) VLD2012-59 DC2012-25 |
[more] | VLD2012-59 DC2012-25 pp.1-5 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-29 10:15 |
Miyazaki | NewWelCity Miyazaki | A Hardware/Software Co-Design Method Optimized for High-Level Synthesis
-- Application to Android Platforms -- Hitoki Ito, Kiyofumi Tanaka (JAIST) VLD2011-70 DC2011-46 |
We suggest a hardware/software co-design method covers the weakness of high-level synthesis to maximize the benefits of ... [more] | VLD2011-70 DC2011-46 pp.109-113 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-30 10:55 |
Miyazaki | NewWelCity Miyazaki | Inhibiting Fluctuation of Execution Time of Real Time Tasks using Tightly Coupled Memory Tomoaki Ukezono, Yuanzhe LIU, Kiyofumi Tanaka (JAIST) CPSY2011-53 |
In real-time systems, predicting execution time of each task precisely takes the systems to significance of maintainin... [more] |
CPSY2011-53 pp.59-64 |
| RECONF | 2005-12-02 11:25 |
Fukuoka | Kitakyushu International Conference Center | Evaluation of Reconfigurable and Highly Functional Memory Controller Toshiharu Imai, Kiyofumi Tanaka (JAIST) |
In this paper,we propose a method of supporting fast execution for large amount of data,by equipping a memory controller... [more] | RECONF2005-75 pp.19-24 |
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