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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, ICD 2008-03-05
15:20
Okinawa TiRuRu Analog Floorplan with Soft-Module Configuration
Kentarou Murata, Kazuya Sasaki, Qing Dong, Jing Li, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2007-142 ICD2007-165
In MOS analog design,
the transistor size is increasing as the supply voltage becomes lower, and the layout configurat... [more]
VLD2007-142 ICD2007-165
pp.31-36
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