Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] |
2020-01-23 11:00 |
Kanagawa |
Raiosha, Hiyoshi Campus, Keio University |
Memory access optimization for convolution with scheduling transformations of dependence graphs Takayuki Todokoro, Kenshu Seto (TCU) VLD2019-69 CPSY2019-67 RECONF2019-59 |
[more] |
VLD2019-69 CPSY2019-67 RECONF2019-59 pp.99-104 |
VLD, HWS (Joint) |
2018-02-28 14:20 |
Okinawa |
Okinawa Seinen Kaikan |
Development of Loop Flattening Tool that Reduces Cycle Overhead in Loop Pipelining of Nested Loops in High Level Synthesis Daisuke Ishikawa, Kenshu Seto (TCU) VLD2017-97 |
We develop a loop flattening tool for designing hardware with high level synthesis. When loop pipelining is applied to ... [more] |
VLD2017-97 pp.49-54 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-07 10:30 |
Kumamoto |
Kumamoto-Kenminkouryukan Parea |
Area Reduction of Digital Circuit Part in Analog-to-Digital Converter Based on β-Expansion by Eliminating Look-Up Table Yuji Shindo, Kenshu Seto, Hao San (TCU) VLD2017-44 DC2017-50 |
We propose an area reduction method of digital circuit part in analog-to-digital converter (ADC) based on β-expansion. T... [more] |
VLD2017-44 DC2017-50 pp.101-104 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-30 13:45 |
Osaka |
Ritsumeikan University, Osaka Ibaraki Campus |
Data Transfer Optimization for Cycle Count and Buffer Size Reduction in Accelerator Design with High-Level Synthesis Daisuke Ishikawa, Kenshu Seto (TCU) VLD2016-69 DC2016-63 |
We propose data transfer optimization in accelerator design with high-level synthesis. Typical accelerator designs perfo... [more] |
VLD2016-69 DC2016-63 pp.147-152 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-29 10:25 |
Kagoshima |
|
Forwarding Unit Generation for Loop Pipelining in High-Level Synthesis Shingo Kusakabe, Tomohito Toyama, Kenshu Seto (Tokyo City Univ.) VLD2013-95 DC2013-61 |
In the loop pipelining of high-level synthesis, the reduction of initiation intervals (IIs) is very important. Existing ... [more] |
VLD2013-95 DC2013-61 pp.245-249 |
VLD, IPSJ-SLDM |
2013-05-16 15:00 |
Fukuoka |
Kitakyushu International Conference Center |
Data Dependence Relaxation Techniques for Reducing Iteration Intervals in Pipelined Loops Shingo Kusakabe, Kenshu Seto (Tokyo City Univ.) VLD2013-7 |
In the loop pipelining of high-level synthesis, the sum of the delays in the cycles of the data dependence graph is a ma... [more] |
VLD2013-7 pp.55-60 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-26 10:55 |
Fukuoka |
Centennial Hall Kyushu University School of Medicine |
Scalar replacement with exact analysis of array accesses Hiroaki Takehana, Kenshu Seto (Tokyo City Univ.) VLD2012-60 DC2012-26 |
Reduction of array accesses in C descriptions is often an effective way to generate high performance RTL descriptions. S... [more] |
VLD2012-60 DC2012-26 pp.7-12 |
IE, SIP, ICD, VLD, IPSJ-SLDM [detail] |
2012-10-19 15:20 |
Iwate |
Hotel Ruiz |
Reduction of array accesses with WAR dependencies Takayuki Ookawa, Kenshu Seto (Tokyo City Univ.) VLD2012-56 SIP2012-78 ICD2012-73 IE2012-80 |
[more] |
VLD2012-56 SIP2012-78 ICD2012-73 IE2012-80 pp.89-94 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-29 09:50 |
Miyazaki |
NewWelCity Miyazaki |
Automatic Loop Fusion for High Level Synthesis using Outer Loop Shifting Yuta Kato, Kenshu Seto, Takuya Maruizumi (TCU) VLD2011-69 DC2011-45 |
When designing hardware with high-level synthesis tools, it is often necessary to manually perform loop restructuring op... [more] |
VLD2011-69 DC2011-45 pp.103-108 |
ICD, VLD |
2007-03-07 15:40 |
Okinawa |
Mielparque Okinawa |
Specification description and verification methods for IPs of hardware design Yuji Ishikawa (Univ. of Tokyo), SeongWoon Kang (Samsung), Yeonbok Lee (Univ. of Tokyo), GiLark Park (Samsung), Shota Watanabe, Kenshu Seto, Satoshi Komatsu (Univ. of Tokyo), Hirofumi Hamamura (Samsung), Masahiro Fujita (Univ. of Tokyo) |
[more] |
VLD2006-113 ICD2006-204 pp.43-48 |
ICD, VLD |
2007-03-07 16:00 |
Okinawa |
Mielparque Okinawa |
IP library retrieval system for design reuse Yeonbok Lee (University of Tokyo), GiLark Park (SAMSUNG), Yuji Ishikawa (University of Tokyo), SeongWoon Kang (SAMSUNG), Shota Watanabe, Kenshu Seto, Satoshi Komatsu (University of Tokyo), Hirofumi Hamamura (SAMSUNG), Masahiro Fujita (University of Tokyo) |
[more] |
VLD2006-114 ICD2006-205 pp.49-54 |
VLD, IPSJ-SLDM |
2006-05-11 15:30 |
Ehime |
Ehime University |
Automatic Generation of Custom Instructions with Memory Access and Resource Sharing Kenshu Seto, Masahiro Fujita (Univ. of Tokyo) |
[more] |
VLD2006-4 pp.19-24 |