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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF 2023-06-08
16:00
Kochi Eikokuji Campus, Kochi University of Technology
(Primary: On-site, Secondary: Online)
Parallelization of Prim's Algorithm Using FPGA and Its Performance Evaluation
Noritsune O, Kenji Kanazawa, Moritoshi Yasunaga (Univ. of Tsukuba) RECONF2023-3
A subgraph of an undirected graph G that is connected and contains no closed paths is called a tree, a global tree is a ... [more] RECONF2023-3
pp.13-16
DC, CPSY, IPSJ-ARC [detail] 2021-10-11
10:00
Online Online A Study for Accelerating SpMV Using FPGA with High Bandwidth Memory
Ryosuke Yanagisawa, Kenji Kanazawa, Moritoshi Yasunaga (University of Tsukuba) CPSY2021-12 DC2021-12
Sparse Matrix-Vector Multiplication (SpMV) is a fundamental operation that appears in various computer science applicati... [more] CPSY2021-12 DC2021-12
pp.1-6
RECONF 2017-09-26
10:25
Tokyo DWANGO Co., Ltd. High-speed Calculation of k-means Clustering Using FPGA and its Application to Pick and Place Machine
Shogo Nakamura, Hiroki Ebara, Kenji Kanazawa (Univ. of Tsukuba), Noriyuki Aibe (Keio Univ.), Moritoshi Yasunaga (Univ. of Tsukuba) RECONF2017-32
 [more] RECONF2017-32
pp.57-62
RECONF 2015-06-19
14:10
Kyoto Kyoto University High Speed Calculation of Convex Hull in 2D Images using FPGA
Kahori Kemmotsu, Kenji Kanazawa, Yamato Mori (Univ. of Tsukuba), Noriyuki Aibe (SUSUBOX), Moritoshi Yasunaga (Univ. of Tsukuba) RECONF2015-7
Given a set of points, a convex hull is the smallest convex polygon containing all the points. In this paper, we describ... [more] RECONF2015-7
pp.35-40
RECONF 2014-06-12
16:00
Miyagi Katahira Sakura Hall FPGA Acceleration of SAT/MaxSAT Solving using Variable-way Set Associative Cache
Kenji Kanazawa, Tsutomu Maruyama (Univ. of Tsukuba) RECONF2014-14
WalkSAT (WSAT) is one of the stochastic local search algorithms for Boolean Satisfiability (SAT) and Maximum Boolean Sat... [more] RECONF2014-14
pp.73-78
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