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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 8 of 8  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD 2016-04-14
15:15
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] 1T1MTJ STT-MRAM Cell Array Design with an Adaptive Reference Voltage Generator
Hiroki Koike, Sadahiko Miura, Hiroaki Honjo, Tosinari Watanabe, Hideo Sato, Soshi Sato, Takashi Nasuno, Yasuo Noguchi, Mitsuo Yasuhira, Takaho Tanigawa, Masaaki Niwa, Kenchi Ito, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh (Tohoku Univ.) ICD2016-10
A device-variation-tolerant spin-transfer-torque magnetic random access memory (STT-MRAM) cell array with a high-signal-... [more] ICD2016-10
pp.51-56
ICD 2011-04-18
10:00
Hyogo Kobe University Takigawa Memorial Hall [Invited Talk] Trends and Multi-level-cell Technology of Spin Transfer Torque Memory
Takashi Ishigaki, Takayuki Kawahara, Riichiro Takemura, Kazuo Ono, Kenchi Ito (Hitachi), Hideo Ohno (Tohoku U.) ICD2011-1
A MLC (Multi-level cell) SPRAM (Spin transfer torque RAM) with series-stacked MTJs (Magnetic tunnel junctions) was devel... [more] ICD2011-1
pp.1-5
SDM 2010-11-11
13:00
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Trends of Magnetic Memory; Multi-Level-Cell Spin Transfer Torque Memory
Takashi Ishigaki, Takayuki Kawahara, Riichiro Takemura, Kazuo Ono, Kenchi Ito (Hitachi), Hideo Ohno (Tohoku U.) SDM2010-173
A MLC (Multi-level cell) SPRAM (Spin transfer torque RAM) with series-stacked MTJs (Magneto tunnel junctions) was develo... [more] SDM2010-173
pp.11-15
ICD 2010-04-22
15:45
Kanagawa Shonan Institute of Tech. A 32-Mb SPRAM with localized bi-directional write driver, '1'/'0' dual-array equalized reference scheme, and 2T1R memory cell layout
Riichiro Takemura, Takayuki Kawahara, Katsuya Miura, Hiroyuki Yamamoto, Jun Hayakawa, Nozomu Matsuzaki, Kazuo Ono, Michihiko Yamanouchi, Kenchi Ito, Hiromasa Takahashi (Hitachi), Shoji Ikeda (Tohoku Univ.), Haruhiro Hasegawa, Hideyuki Matsuoka (Hitachi), Hideo Ohno (Tohoku Univ.) ICD2010-10
A 32-Mb SPin-transfer torque RAM (SPRAM) chip was demonstrated with an access time of 32 ns and a cell write-time of 40 ... [more] ICD2010-10
pp.53-57
ITE-MMS, MRIS 2009-10-08
13:55
Fukuoka FUKUOKA traffic center [Invited Talk] Nonvolatile RAM using spin transfer torque magnetization reversal (SPRAM)
Hiromasa Takahashi, Kenchi Ito, Jun Hayakawa, Katsuya Miura, Hiroyuki Yamamoto, Michihiko Yamanouchi (ARL, Hitachi, Ltd.), Kazuo Ono, Riichiro Takemura, Takayuki Kawahara (CRL, Hitachi, Ltd.), Ryutaro Sasaki (RIEC Tohoku Univ.), Haruhiro Hasegawa (RIEC Tohoku Univ., ARL, Hitachi, Ltd.), Shoji Ikeda (RIEC Tohoku Univ.), Hideyuki Matsuoka (ARL, Hitachi, Ltd.), Hideo Ohno (RIEC Tohoku Univ.)
The SPRAM (Spin Transfer Torque MRAM) is one of nonvolatile memories that “writing” is done by that a magnetization in M... [more]
SDM, ED 2009-06-24
14:30
Overseas Haeundae Grand Hotel, Busan, Korea [Invited Talk] Advanced magnetic tunnel junctions for hybrid spintronics/CMOS circuits
Shoji Ikeda (Tohoku Univ.), Jun Hayakawa (Hitachi, Ltd.), Huadong Gan, Kotaro Mizumuma, Ji Ho Park (Tohoku Univ.), Hiroyuki Yamamoto, Katsuya Miura (Hitachi, Ltd./Tohoku Univ.), Haruhiro Hasegawa, Ryutaro Sasaki, Toshiyasu Meguro (Tohoku Univ.), Kenchi Ito (Hitachi, Ltd.), Fumihiro Matsukura, Hideo Ohno (Tohoku Univ.) ED2009-51 SDM2009-46
Magnetoresistive random access memory (MRAM) using magnetic tunnel junctions (MTJs) is one of the candidates of universa... [more] ED2009-51 SDM2009-46
pp.5-8
ICD, SDM 2007-08-24
15:15
Hokkaido Kitami Institute of Technology SPRAM (SPin-transfer torque RAM) with a synthetic ferrimagnetic free layer for suppressing read disturbance and write-current dispersion
Katsuya Miura, Takayuki Kawahara, Riichiro Takemura (Hitachi, Ltd.), Jun Hayakawa (Hitachi, Ltd./Tohoku Univ.), Michihiko Yamanouchi (Hitachi, Ltd.), Shoji Ikeda, Ryutaro Sasaki (Tohoku Univ.), Kenchi Ito, Hiromasa Takahashi, Hideyuki Matsuoka (Hitachi, Ltd.), Hideo Ohno (Tohoku Univ.) SDM2007-166 ICD2007-94
SPin-transfer torque RAM (SPRAM) with MgO-barrier-based magnetic tunnel junctions (MTJs) is a promising candidate for a ... [more] SDM2007-166 ICD2007-94
pp.135-138
ICD 2007-04-12
13:00
Oita   [Invited Talk] 2-Mb SPRAM (SPin-transfer torque RAM) with Bit-by-bit Bi-Directional Current Write and Parallelizing-Direction Current Read
Riichiro Takemura, Takayuki Kawahara, Katsuya Miura (Hitachi), Jun Hayakawa (Hitachi/Tohoku Univ.), Shoji Ikeda, Young Min LEE, Ryutaro Sasaki (Tohoku Univ.), Yasushi Goto, Kenchi Ito (Hitachi), Toshiyasu Meguro, Fumihiro Matsukura (Tohoku Univ.), Hiromasa Takahashi (Hitachi/Tohoku Univ.), Hideyuki Matsuoka (Hitachi), Hideo Ohno (Tohoku Univ.) ICD2007-6
A 1.8-V 2-Mb SPRAM (SPin-transfer torque RAM) chip using 0.2 µm logic process with MgO tunneling barrier cell demo... [more] ICD2007-6
pp.29-34
 Results 1 - 8 of 8  /   
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