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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 10 of 10  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2024-02-21
10:45
Tokyo Tokyo University-Hongo-Engineering Bldg.4
(Primary: On-site, Secondary: Online)
[Invited Talk] Development of Superconducting Nb Interconnects for Low-Temperature SoC for Qubit Control
Hideaki Numata, Noriyuki Iguchi (NBS), Masamitsu Tanaka (Nagoya Univ.), Koichiro Okamoto, Sadahiko Miura (NBS), Ken Uchida (UTokyo), Hiroki Ishikuro (Keio Univ.), Toshitsugu Sakamoto, Munehiro Tada (NBS) SDM2023-82
A 100 nm wide superconducting Nb interconnects were fabricated by a 300-mm wafer process for low temperature SoC applica... [more] SDM2023-82
pp.4-8
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2022-11-30
09:30
Kumamoto  
(Primary: On-site, Secondary: Online)
Development of 65nm-Cryo-CMOS Circuit Design Library
Toshitsugu Sakamoto, Makoto Miyamura, Kazunori Funahashi, Koichiro Okamoto, Munehiro Tada (NBS), Takahisa Tanaka, Ken Uchida (Tokyo Univ.), Hiroki Ishikuro (Keio Univ.) VLD2022-38 ICD2022-55 DC2022-54 RECONF2022-61
 [more] VLD2022-38 ICD2022-55 DC2022-54 RECONF2022-61
pp.111-114
SDM 2018-11-08
10:20
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Development and Education of Electron Devices assisted with Computer Simulation
Ken Uchida (Univ. of Tokyo), Takahisa Tanaka (Keio Univ.) SDM2018-65
To develop nano-scale electronic devices, computer simulations in which quantum mechanical effects and detailed band str... [more] SDM2018-65
pp.7-10
SDM 2013-11-15
10:00
Tokyo Kikai-Shinko-Kaikan Bldg. Analytical drain current and threshold voltage model and device design of short-channel Si nanowire transistors
Chika Tanaka, Daisuke Hagishima (Toshiba), Ken Uchida (Keio Univ.), Toshinori Numata (Toshiba) SDM2013-106
 [more] SDM2013-106
pp.37-42
ICD, SDM 2012-08-02
13:50
Hokkaido Sapporo Center for Gender Equality, Sapporo, Hokkaido 10nm-Diameter Tri-Gate Silicon Nanowire MOSFETs with Enhanced High-Field Transport and Vth Tunability through Thin BOX
Kensuke Ota, Masumi Saitoh, Chika Tanaka (Toshiba), Ken Uchida (TIT), Toshinori Numata (Toshiba) SDM2012-70 ICD2012-38
 [more] SDM2012-70 ICD2012-38
pp.37-42
SDM, ED
(Workshop)
2012-06-29
11:15
Okinawa Okinawa Seinen-kaikan [Invited Talk] Thermal-Aware Device Desing of Nanoscale MOS Transistors
Ken Uchida (Keio Univ.), Tsunaki Takahashi, Nobuyasu Beppu (Tokyo Tech)
The self-heating effects in Bulk/SOI FinFETs have been systematically investigated and compared. It is demonstrated that... [more]
ED, MW 2012-01-12
10:10
Tokyo Kikai-Shinko-Kaikan Bldg Study of source charging time in InGaAs MOSFET
Yasuyuki Miyamoto, Masayuki Yamada, Ken Uchida (Tokyo Tech) ED2011-129 MW2011-152
When ballistic transportation of electrons in the channel of MOSFET is realized by channel shrinkage, drain current is c... [more] ED2011-129 MW2011-152
pp.59-62
ED, SDM 2010-07-01
11:10
Tokyo Tokyo Inst. of Tech. Ookayama Campus [Invited Talk] Stress and Surface Orientation Engineering in Scaled CMOSFETs Considering High-Field Carrier Transport
Masumi Saitoh, Yukio Nakabayashi (Toshiba), Ken Uchida (Tokyo Inst. of Tech.), Toshinori Numata (Toshiba) ED2010-79 SDM2010-80
We present the systematic study on the performance of short-channel and strained (100) and (110) n/pMOSFETs. Saturation ... [more] ED2010-79 SDM2010-80
pp.125-129
ICD, SDM 2008-07-17
09:25
Tokyo Kikai-Shinko-Kaikan Bldg. Drain Current Fluctuation in High-k Dielectric p-MOSFETs -- Effects of Single-Hole Capture/Emission by the Traps in High-k Dielectric --
Shigeki Kobayashi, Masumi Saitoh, Ken Uchida (Corporate RDC, Toshiba Corp.) SDM2008-129 ICD2008-39
Random telegraph noise (RTN) in scaled MOSFETs is one of the biggest concerns in the present and future LSIs. However, R... [more] SDM2008-129 ICD2008-39
pp.7-10
SDM 2008-06-09
16:50
Tokyo An401・402, Inst. Indus. Sci., The Univ. of Tokyo Inversion-Layer Capacitance and Low-Field Mobility Characteristics in Si(110) pMOSFETs
Masumi Saitoh, Shigeki Kobayashi, Ken Uchida (Toshiba) SDM2008-46
Basic transport properties of Si (110) pMOSFETs are systematically investigated. Inversion-layer capacitance of (110) p... [more] SDM2008-46
pp.23-27
 Results 1 - 10 of 10  /   
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