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All Technical Committee Conferences (Searched in: All Years)
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| Search Results: Conference Papers |
| Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| ICD |
2010-04-22
13:30 |
Kanagawa |
Shonan Institute of Tech. |
[Invited Talk]
A 64Mbit MRAM with Clamped-Reference and Adequate-Reference Schemes
Kenji Tsuchida, Tsuneo Inaba, Katsuyuki Fujita, Yoshihiro Ueda, Takafumi Shimizu, Yoshiaki Asao, Takeshi Kajiyama, Masayoshi Iwayama, Sumio Ikegawa, Tatsuya Kishi, Tadashi Kai, Minoru Amano, Naoharu Shimomura, Hiroaki Yoda, Yohji Watanabe (TOSHIBA)  ICD2010-7 |
A 64Mb spin-transfer-torque MRAM in 65nm CMOS is developed. 47mm2 die uses 0.3584um2 cell with the perpendicular-TMR dev... [more] |
ICD2010-7
pp.35-40 |
| ICD |
2007-04-13
09:10 |
Oita |
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Floating Body RAM Technology and its Scalability to 32nm Node
Hiroomi Nakajima, Naoki Kusunoki, Tomoaki Shino (Toshiba), Tomoki Higashi (TOSMEC), Takashi Ohsawa, Katsuyuki Fujita, Nobuyuki Ikumi, Fumiyoshi Matsuoka, Ryo Fukuda, Yohji Watanabe, Yoshihiro Minami (Toshiba), Atsushi Sakamoto (TJ), Jun Nishimura, Takeshi Hamamoto, Akihiro Nitayama (Toshiba) ICD2007-10 |
Technologies and improved performance of the Floating Body RAM are demonstrated. Reducing SOI thickness to 43nm, a 16Mb ... [more] |
ICD2007-10
pp.53-58 |
| ICD |
2006-04-13
11:35 |
Oita |
Oita University |
Technology development of 128Mb-FBC(Floating Body Cell) Memory by 90nm node CMOS process
Hiroomi Nakajima, Yoshihiro Minami, Tomoaki Shino (SoC Center, Toshiba), Atsushi Sakamoto (TJ), Tomoki Higashi (TOSMEC), Naoki Kusunoki, Katsuyuki Fujita, Kosuke Hatsuda, Takashi Ohsawa, Nobutoshi Aoki, Hiroyoshi Tanimoto, Mutsuo Morikado, Kazumi Inoh, Takeshi Hamamoto, Akihiro Nitayama (SoC Center, Toshiba) |
A 128Mb SOI DRAM with FBC (Floating Body Cell) has been successfully developed for the first time. In order to realize f... [more] |
ICD2006-5
pp.25-30 |
| SIP, ICD, IE, IPSJ-SLDM |
2005-10-20
16:50 |
Miyagi |
Ichinobo, Sakunami-Spa |
A 333MHz Random Cycle DRAM Using the Floating Body Cell
Kosuke Hatsuda, Katsuyuki Fujita, Takashi Ohsawa (Toshiba Corp.) |
[more] |
SIP2005-114 ICD2005-133 IE2005-78
pp.113-118 |
| ICD |
2005-04-14
11:40 |
Fukuoka |
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A 128Mb DRAM Using a 1T Gain Cell(FBC) on SOI
Takashi Ohsawa, Katsuyuki Fujita, Kosuke Hatsuda (Toshiba), Tomoki Higashi (Toshiba Microelectronics), Mutsuo Morikado, Yoshihiro Minami, Tomoaki Shino, Hiroomi Nakajima, Kazumi Inoh, Takeshi Hamamoto, Shigeyoshi Watanabe (Toshiba) |
We report on a 128Mbit DRAM design using the capacitor-less DRAM cell or the floating body cell(FBC) on SOI. The cell of... [more] |
ICD2005-5
pp.23-28 |
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