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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 18 of 18  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2021-02-05
Online Online [Invited Talk] R&D of 3D-IC Technology in the era of AI, IoT, Big data
Katsuya Kikuchi (AIST) SDM2020-60
3D integration is one of the most important technologies for developing new-generation electronics devices. In this arti... [more] SDM2020-60
MRIS, ITE-MMS 2020-10-05
Online Online [Invited Talk] Fabrication of the fully-epitaxial magnetoresistance device on the poly-crystalline electrode using three-dimensional integration technology -- Progress of fully-epitaxial magnetoresistance devices --
Yuya Sakuraba, Jiamin Chen (NIMS), Kay Yakushiji, Yuichi Kurashima, Naoya Watanabe, Akio Fukushima, Hideki Takagi, Katsuya Kikuchi, Shinji Yuasa (AIST), Kazuhiro Hono (NIMS)
ICD, SDM, ITE-IST [detail] 2020-08-06
Online Online Over-the-top Si Interposer Embedding Backside Buried Metal to Reduce Power Supply Impedance
Takuji Miki, Makoto Nagata, Akihiro Tsukioka (Kobe Univ.), Noriyuki Miura (Osaka Univ.), Takaaki Okidono (ECSEC), Yuuki Araga, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi (AIST) SDM2020-5 ICD2020-5
A 2.5D structure with a Si interposer stacked on a CMOS chip is developed to reduce power supply impedance. A backside b... [more] SDM2020-5 ICD2020-5
SDM 2019-02-07
Tokyo   [Invited Talk] Stress Investigation of Annular-Trench-Isolated (ATI) Through Silicon Via (TSV)
Wei Feng, Naoya Watanabe, Haruo Shimamoto, Masahiro Aoyagi, Katsuya Kikuchi (AIST) SDM2018-93
The methods as parylene substitute of SiO2 as dielectric layer and annular structure lose efficacy for thermal stress re... [more] SDM2018-93
(Joint) [detail]
Kumamoto Kumamoto City International Center CPSY2018-21  [more] CPSY2018-21
SDM 2017-02-06
Tokyo Tokyo Univ. [Invited Talk] Development of a Wet Cleaning Process for High-Yield Formation of via-last TSVs
Naoya Watanabe (AIST), Hidekazu Kikuchi, Azusa Yanagisawa (LAPIS), Haruo Shimamoto, Katsuya Kikuchi, Masahiro Aoyagi (AIST), Akio Nakamura (LAPIS) SDM2016-145
 [more] SDM2016-145
(Joint) [detail]
Osaka Ritsumeikan University, Osaka Ibaraki Campus EMI Performance of Power Delivery Networks in 3D TSV Integration
Yuuki Araga (AIST), Makoto Nagata, Noriyuki Miura, Hiroaki Ikeda (Kobe Univ.), Katsuya Kikuchi (AIST) CPM2016-78 ICD2016-39 IE2016-73
 [more] CPM2016-78 ICD2016-39 IE2016-73
ICD, MW 2016-03-02
Hiroshima Hiroshima University In-stack diagnosis of power delivery network response in 3D IC
Ranto Miura (Kobe Univ.), Yuuki Araga (AIST), Hiroaki Ikeda, Noriyuki Miura (Kobe Univ.), Katsuya Kikuchi (AIST), Makoto Nagata (Kobe Univ.) MW2015-179 ICD2015-102
 [more] MW2015-179 ICD2015-102
SDM 2014-02-28
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] 15μm-pitch Bump Interconnections Relied on Flip-chip Bonding Technique -- for Advanced Chip Stacking Applications --
Masahiro Aoyagi, Thanh-Tung Bui, Fumiki Kato, Naoya Watanabe, Shunsuke Nemoto, Katsuya Kikuchi (AIST) SDM2013-173
This paper reports the development of reliable fine-pitch micro-bump Cu/Au interconnections relied on a high-precision r... [more] SDM2013-173
ICD, SDM 2012-08-02
Hokkaido Sapporo Center for Gender Equality, Sapporo, Hokkaido Power Consumption Evaluation of COOL Chip : Heterogeneous Multi-Core Processors for energy-saving Embedded Systems
Michiya Hagimoto, Hiroyuki Uchida, Takashi Omori, Yasumori Hibi, Yukoh Matsumoto (TOPS Systems), Fumito Imura, Naoya Watanabe, Katsuya Kikuchi, Motohiro Suzuki, Hiroshi Nakagawa, Masahiro Aoyagi (AIST)
ICD, SDM 2012-08-02
Hokkaido Sapporo Center for Gender Equality, Sapporo, Hokkaido 3D Interconnect Technology by the Ultrawide-Interchip-Bus System for 3D Stacked LSI Systems
Fumito Imura, Shunsuke Nemoto, Naoya Watanabe, Fumiki Kato, Katsuya Kikuchi, Hiroshi Nakagawa (AIST), Michiya Hagimoto, Hiroyuki Uchida, Takashi Omori, Yasumori Hibi, Yukoh Matsumoto (TOPS Systems), Masahiro Aoyagi (AIST) SDM2012-71 ICD2012-39
We have proposed the ultrawide-interchip-bus system for the interchip communication of the 3-dimentional stacked LSI sys... [more] SDM2012-71 ICD2012-39
VLD 2012-03-06
Oita B-con Plaza LSI Implementation of Heterogeneous Multi-Chip Processor for energy-saving Embedded Systems : COOL Chip
Hiroyuki Uchida, Michiya Hagimoto, Tomoyuki Morimoto, Nobuyuki Hikichi, Yukoh Matsumoto (TOPS Systems), Fumito Imura, Naoya Watanabe, Katsuya Kikuchi, Motohiro Suzuki, Hiroshi Nakagawa, Masahiro Aoyagi (AIST) VLD2011-122
The authors have suggested the low-power embedded heterogeneous multi-chip processor system: COOL Chip. We designed two ... [more] VLD2011-122
VLD 2011-03-04
Okinawa Okinawaken-Danjo-Kyodo-Sankaku Center A scalable prototyping system for 3D-stacked LSI development
Marco Chacin, Hiroyuki Uchida, Michiya Hagimoto, Takashi Miyazaki, Takeshi Ohkawa, Rimon Ikeno, Yukoh Matsumoto (TOPS Systems), Fumito Imura, Katsuya Kikuchi, Motohiro Suzuki, Hiroshi Nakagawa, Masahiro Aoyagi (AIST) VLD2010-145
(To be available after the conference date) [more] VLD2010-145
LQE 2009-12-11
Tokyo Kikai-Shinko-Kaikan Bldg. Self-alignment technology of optical devices and optical sub-assembly for optical interconnect
Atsushi Suzuki (NGK Spark Plug Co., Ltd.), Katsuya Kikuchi, Yoshikuni Okada, Hiroshi Nakagawa, Masahiro Aoyagi, Takashi Mikawa (AIST) LQE2009-153
We report a novel optical implementation technology and an optical subassembly for inter- and intra-cabinet optical sign... [more] LQE2009-153
CPM, ICD 2008-01-18
Tokyo Kikai-Shinko-Kaikan Bldg A method of Ultra-fine Pad Interconnection using Electroless Deposition
Tokihiko Yokoshima, Yasuhiro Yamaji, Yuichiro Tamura, Katsuya Kikuchi, Hiroshi Nakagawa, Masahiro Aoyagi (AIST) CPM2007-147 ICD2007-158
Decrease in bonding temperature and bonding pressure are key challenges for higher interconnection-density packages in r... [more] CPM2007-147 ICD2007-158
CPM, LQE, OPE, EMD 2007-08-23
Hokkaido Hokaido Univ. Fundamental Analysis of Coupling Efficiency and DMD for High-speed Board and Chip Level Optical Interconnects
Yoshitsugu Wakazono, Atsushi Suzuki, Daisuke Nagao, Takaaki Ishikawa, Tomoyuki Hino, Yoichi Hashimoto, Hiroshi Masuda, Shuji Suzuki, Mitsuaki Tamura, Teiichi Suzuki, Katsuya Kikuchi, Hiroshi Nakagawa, Masahiro Aoyagi, Takashi Mikawa (AIST) EMD2007-38 CPM2007-59 OPE2007-76 LQE2007-39
We evaluated coupling efficiency between VCSEL and optical components and DMD(Differential Mode Delay) as a fundamental ... [more] EMD2007-38 CPM2007-59 OPE2007-76 LQE2007-39
CPM, LQE, OPE, EMD 2007-08-24
Hokkaido Hokaido Univ. The Fabrication of Multi Wavelength CWDM Monolithic VCSELs for High Density Packaging
Tei-ichi Suzuki, Daisuke Nagao, Yoshitsugu Wakazono, Atsushi Suzuki, Takaaki Ishikawa, Hiroshi Masuda, Yoichi Hashimoto, Katsuya Kikuchi, Mitsuaki Tamura, Hiroshi Nakagawa, Masahiro Aoyagi, Takashi Mikawa (AIST) EMD2007-48 CPM2007-69 OPE2007-86 LQE2007-49
Two kinds of VCSELs with different wavelengths were monolithically fabricated on GaAs substrates for CWDM applications a... [more] EMD2007-48 CPM2007-69 OPE2007-86 LQE2007-49
ICD, CPM 2005-09-08
Tokyo Kikai-Shinko-Kaikan Bldg. Characteristic dielectric constant for polyimide thin films at 10GHz
Shigemasa Segawa (PI R&D), Sachiko Ito, Katsuya Kikuchi, Kazuhiko Tokoro, Hiroshi Nakagawa, Masahiro Aoyagi (AIST)
 [more] CPM2005-86 ICD2005-96
 Results 1 - 18 of 18  /   
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