IEICE Technical Committee Submission System
Conference Schedule		 Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF 2011-05-13
13:30		 Hokkaido Hokkaido Univ. (Faculty of Eng., B3 Bldg.) A Implementation of Programmable Re-Ordering Unit for Array Processor
Tomoyoshi Kobori, Nozomi Ishihara, Katsutoshi Seki, Masao Ikekawa (NEC) RECONF2011-18		 We present a novel re-ordering unit architecture for array processor. In novel re-ordering unit, memory architecture is ... [more] RECONF2011-18
pp.103-108
SR 2008-07-31
13:55		 Tokyo NICT (Koganei,-city Tokyo) An efficient memory access system for array processor in wireless comunication system
Tomoyoshi Kobori, Katsutoshi Seki, James Okello, Masao Ikekawa (NEC) SR2008-23		 This paper describes the efficient memory access system for array processor in wireless communication system. Today, the... [more] SR2008-23
pp.37-42
SR 2008-01-25
09:00		 Nagano Tateyama Prince hotel (Ohmachi city, Nagano prefecture) A CORDIC-BASED RECONFIGURABLE SYSTOLIC ARRAY PROCESSOR FOR MIMO-OFDM WIRELESS COMMUNICATIONS
Katsutoshi Seki, Tomoyoshi Kobori, James Okello, Masao Ikekawa (NEC) SR2007-72		 A reconfigurable systolic array processor based on a coordinate rotation digital computer (CORDIC) algorithm is proposed... [more] SR2007-72
pp.37-42
SR 2008-01-25
09:25		 Nagano Tateyama Prince hotel (Ohmachi city, Nagano prefecture) Interference Mitigation for WCDMA Using a QR Decomposition and a CORDIC-based Reconfigurable Systolic Array
Robin Scheibler (Seiss Federal Inst. of Tech.), James Okello, Katsutoshi Seki, Tomoyoshi Kobori, Masao Ikekawa (NEC) SR2007-73		 This paper presents implementation and performance of QR Decomposition based Recursive Least-
-Squares (QRD-RLS) for in... [more]		 SR2007-73
pp.43-48
SR 2008-01-25
09:50		 Nagano Tateyama Prince hotel (Ohmachi city, Nagano prefecture) FFT with Reduced Complexity and Its Application to a CORDIC-Based Reconfigurable Systolic Array
James Okello, Katsutoshi Seki, Tomoyoshi Kobori, Masao Ikekawa (NEC) SR2007-74		  [more] SR2007-74
pp.49-54
SIP, CAS, CS 2007-03-06
09:30		 Tottori Blancart Misasa (Tottori) [Poster Presentation] The Co-operated System between FPGA Emulator and MATLAB
Tomoyoshi Kobori, Katsutoshi Seki, James Okello, Masao Ikekawa (NEC) CAS2006-99 SIP2006-200 CS2006-116		 This paper presents the co-operated system between FPGA emulator and MATLAB. In the field of SoC development, the evalua... [more] CAS2006-99 SIP2006-200 CS2006-116
pp.35-36
 Results 1 - 6 of 6  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

[Return to Top Page]

[Return to IEICE Web Page]
The Institute of Electronics, Information and Communication Engineers (IEICE), Japan