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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD 2014-01-28
15:00
Kyoto Kyoto Univ. Tokeidai Kinenkan [Poster Presentation] An Autonomous Control Cache Memory for Dynamic Variation Tolerance with Bit-Enhancing Memory
Yuta Kimi, Yohei Nakata, Shunsuke Okumura, Jinwook Jung, Takuya Sawada, Taku Toshikawa (Kobe Univ.), Makoto Nagata (Kobe Univ./JST CREST), Hirofumi Nakano, Makoto Yabuuchi, Hidehiro Fujiwara, Koji Nii, Hiroyuki Kawai (Renesas Electronics Corporation), Hiroshi Kawaguchi (Kobe Univ.), Masahiko Yoshimoto (Kobe Univ./JST CREST) ICD2013-125
Processor reliability is getting more critical issue since technology scaling degrades processor tolerance against power... [more] ICD2013-125
p.59
ICD 2013-04-11
16:45
Ibaraki Advanced Industrial Science and Technology (AIST) Spin-Transfer Torque RAM Cache Energy Reduction Using Zero-Data Flags
Yuta Kimi, Jinwook Jung, Yohei Nakata, Masahiko Yoshimoto, Hiroshi Kawaguchi (Kobe Univ.) ICD2013-10
In this paper, we propose an energy reduction scheme for Spin-Transfer Torque RAM (STT-RAM) Caches. Introducing STT-RAM ... [more] ICD2013-10
pp.47-52
ICD, SDM 2012-08-02
09:10
Hokkaido Sapporo Center for Gender Equality, Sapporo, Hokkaido A Variation-Aware Low-Voltage Set-Associative Cache with Mixed-Associativity
Jinwook Jung, Yohei Nakata, Shunsuke Okumura, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) SDM2012-63 ICD2012-31
In this paper, we propose the mixed associativity scheme using 7T/14T SRAM, which can reduce the minimum operating volta... [more] SDM2012-63 ICD2012-31
pp.1-6
ICD, IPSJ-ARC 2012-01-20
10:30
Tokyo   Associativity-Variable Cache to Adaptively Expand Operating Voltage Margin
Jinwook Jung, Yohei Nakata, Shunsuke Okumura, Hiroshi Kawaguchi (Kobe Univ.), Masahiko Yoshimoto (JST) ICD2011-139
This paper presents a dependable cache memory for which associativity can be reconfigured dynamically. The proposed asso... [more] ICD2011-139
pp.55-60
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