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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SIS |
2008-06-13 12:50 |
Hokkaido |
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Application of the massively parallel embedded processor (MX) to real-time image processing Hiroyuki Yamasaki, Takeaki Sugimura, Hideyuki Noda, Osamu Yamamoto, Yoshihiro Okuno, Kazutami Arimoto (Renesas) SIS2008-20 |
We developed the massively parallel embedded processor core (MX core) for the SoC(System on Chip) building in as an acce... [more] |
SIS2008-20 pp.33-38 |
ICD, ITE-CE |
2007-12-14 14:40 |
Kochi |
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A multi matrix-processor core architecture for real-time image processing SoC Katsuya Mizumoto, Takayuki Gyohten, Tetsushi Tanizaki, Soichi Kobayashi, Masami Nakajima, Hiroyuki Yamasaki, Hideyuki Noda, Motoki Higashida, Yoshihiro Okuno, Kazutami Arimoto (Renesas) ICD2007-138 |
This paper describes a real time image processing SoC(MX-SoC) with programmable multi matrix -processor(MX-Core) archite... [more] |
ICD2007-138 pp.107-111 |
CPSY |
2007-10-25 13:00 |
Kumamoto |
Kumamoto University |
The application of the massively parallel processor based on the matrix architecture Katsuya Mizumoto, Hiroyuki Yamasaki, Hideyuki Noda, Tetsushi Tanizaki, Takayuki Gyohten, Masami Nakajima, Motoki Higashida, Yoshihiro Okuno, Kazutami Arimoto (Renesas) CPSY2007-24 |
We have developed programmable matrix-processor "MX-1". The MX-1 consists of MX-Core and a control CPU. The MX-Core is a... [more] |
CPSY2007-24 pp.1-5 |
CPSY |
2007-10-25 13:40 |
Kumamoto |
Kumamoto University |
The program development method of the massively parallel processor based on the matrix architecture. Hiroyuki Yamasaki, Katsuya Mizumoto, Hideyuki Noda, Tetsu Nishijima, Kanako Yoshida, Takeaki Sugimura, Takashi Kurafuji, Osamu Yamamoto, Yoshihiro Okuno, Kazutami Arimoto (Renesas) CPSY2007-25 |
Recently, the installed applications in the digital devices has been remarkably progressed. Considering these background... [more] |
CPSY2007-25 pp.7-12 |
RECONF |
2006-05-18 15:15 |
Miyagi |
TOHOKU UNIVERSITY |
A performance evaluation of Matrix Processing Engine for media applications Takayuki Oono (Kumamoto Univ.), Hiroyuki Yamasaki (Renesas Tech.), Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) |
A performance gain in multimedia processing is demanded by the spread of mobile telephone or digital cameras. MTX (MaTri... [more] |
RECONF2006-6 pp.31-36 |
RECONF |
2005-05-13 14:30 |
Kyoto |
Kyoto University |
A high-speed real number computation using simple SIMD operations Hiroyuki Yamasaki, Masahiro Iida (Kumamoto Univ.), Katsuya Mizumoto, Osamu Yamamoto (Renesas), Toshinori Sueyoshi (Kumamoto Univ.) |
We research the speed-up of application in the embedded system with consideration of cost and power
consumption. This p... [more] |
RECONF2005-23 pp.49-54 |
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