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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
ITE-MMS, MRIS 2009-10-09
10:25
Fukuoka FUKUOKA traffic center [Invited Talk] Low cost technology of phase change memory with low-contact-resistivity poly-Si selection diode
Yoshitaka Sasago, Masaharu Kinoshita, Takahiro Morikawa, Kenzo Kurotsuchi, Satoru Hanzawa, Toshiyuki Mine, Akio Shima, Yoshihisa Fujisaki, Hiroshi Moriya, Norikatsu Takaura, Kazuyoshi Torii (Hitachi) MR2009-26
We have fabricated the cross-point phase change memory with a selection diode made of poly-Si. The selection diode was f... [more] MR2009-26
pp.31-35
ICD, SDM 2009-07-17
12:00
Tokyo Tokyo Institute of Technology Cross-Point phase change memory with 4F2 cell size driven by low-contact resistivity poly-si diode
Yoshitaka Sasago, Masaharu Kinoshita, Takahiro Morikawa, Kenzo Kurotsuchi, Satoru Hanzawa, Toshiyuki Mine, Akio Shima, Yoshihisa Fujisaki, Hitoshi Kume, Hiroshi Moriya, Norikatsu Takaura, Kazuyoshi Torii (Hitachi) SDM2009-112 ICD2009-28
We have fabricated the cross-point phase change memory with a selection diode made of poly-Si. The selection diode was f... [more] SDM2009-112 ICD2009-28
pp.79-83
SDM 2007-03-15
13:05
Tokyo Kikai-Shinko-Kaikan Bldg. Ta2O5 Interfacial Layer between GST and W Plug enabling Low Power Operation of Phase Change Memories
Yuichi Matsui, Kenzo Kurotsuchi, Osamu Tonomura, Takahiro Morikawa, Masaharu Kinoshita, Yoshihisa Fujisaki, Nozomu Matsuzaki, Satoru Hanzawa, Motoyasu Terao, Norikatsu Takaura, Hiroshi Moriya, Tomio Iwasaki (Hitachi), Masahiro Moniwa, Tsuyoshi Koga (Renesas)
A novel memory cell for phase-change memories (PCMs) that enables low-power operation has been developed. Power (i.e., c... [more] SDM2006-254
pp.1-6
ICD, ITE-CE 2006-01-26
10:30
Tokyo Kikai-Shinko-Kaikan Bldg. Phase Change RAM Operated with 1.5-V CMOS as Low Cost Embedded Memory
Satoru Hanzawa, Kenichi Osada, Takayuki Kawahara, Riichiro Takemura (Hitachi CRL), Naoki Kitai (Hitachi ULSI), Norikatsu Takaura, Nozomu Matsuzaki, Kenzo Kurotsuchi (Hitachi CRL), Hiroshi Moriya (Hitachi MERL), Masahiro Moniwa (Renesas)
This paper describes a phase change (PC) RAM operated at the lowest possible voltage, 1.5 V, with a CMOS memory array, u... [more] ICD2005-206
pp.7-12
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