IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 5 of 5  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD 2010-04-22
15:45
Kanagawa Shonan Institute of Tech. A 32-Mb SPRAM with localized bi-directional write driver, '1'/'0' dual-array equalized reference scheme, and 2T1R memory cell layout
Riichiro Takemura, Takayuki Kawahara, Katsuya Miura, Hiroyuki Yamamoto, Jun Hayakawa, Nozomu Matsuzaki, Kazuo Ono, Michihiko Yamanouchi, Kenchi Ito, Hiromasa Takahashi (Hitachi), Shoji Ikeda (Tohoku Univ.), Haruhiro Hasegawa, Hideyuki Matsuoka (Hitachi), Hideo Ohno (Tohoku Univ.) ICD2010-10
A 32-Mb SPin-transfer torque RAM (SPRAM) chip was demonstrated with an access time of 32 ns and a cell write-time of 40 ... [more] ICD2010-10
pp.53-57
ITE-MMS, MRIS 2009-10-08
13:55
Fukuoka FUKUOKA traffic center [Invited Talk] Nonvolatile RAM using spin transfer torque magnetization reversal (SPRAM)
Hiromasa Takahashi, Kenchi Ito, Jun Hayakawa, Katsuya Miura, Hiroyuki Yamamoto, Michihiko Yamanouchi (ARL, Hitachi, Ltd.), Kazuo Ono, Riichiro Takemura, Takayuki Kawahara (CRL, Hitachi, Ltd.), Ryutaro Sasaki (RIEC Tohoku Univ.), Haruhiro Hasegawa (RIEC Tohoku Univ., ARL, Hitachi, Ltd.), Shoji Ikeda (RIEC Tohoku Univ.), Hideyuki Matsuoka (ARL, Hitachi, Ltd.), Hideo Ohno (RIEC Tohoku Univ.)
The SPRAM (Spin Transfer Torque MRAM) is one of nonvolatile memories that “writing” is done by that a magnetization in M... [more]
ICD, SDM 2007-08-24
15:15
Hokkaido Kitami Institute of Technology SPRAM (SPin-transfer torque RAM) with a synthetic ferrimagnetic free layer for suppressing read disturbance and write-current dispersion
Katsuya Miura, Takayuki Kawahara, Riichiro Takemura (Hitachi, Ltd.), Jun Hayakawa (Hitachi, Ltd./Tohoku Univ.), Michihiko Yamanouchi (Hitachi, Ltd.), Shoji Ikeda, Ryutaro Sasaki (Tohoku Univ.), Kenchi Ito, Hiromasa Takahashi, Hideyuki Matsuoka (Hitachi, Ltd.), Hideo Ohno (Tohoku Univ.) SDM2007-166 ICD2007-94
SPin-transfer torque RAM (SPRAM) with MgO-barrier-based magnetic tunnel junctions (MTJs) is a promising candidate for a ... [more] SDM2007-166 ICD2007-94
pp.135-138
ICD 2007-04-12
13:00
Oita   [Invited Talk] 2-Mb SPRAM (SPin-transfer torque RAM) with Bit-by-bit Bi-Directional Current Write and Parallelizing-Direction Current Read
Riichiro Takemura, Takayuki Kawahara, Katsuya Miura (Hitachi), Jun Hayakawa (Hitachi/Tohoku Univ.), Shoji Ikeda, Young Min LEE, Ryutaro Sasaki (Tohoku Univ.), Yasushi Goto, Kenchi Ito (Hitachi), Toshiyasu Meguro, Fumihiro Matsukura (Tohoku Univ.), Hiromasa Takahashi (Hitachi/Tohoku Univ.), Hideyuki Matsuoka (Hitachi), Hideo Ohno (Tohoku Univ.) ICD2007-6
A 1.8-V 2-Mb SPRAM (SPin-transfer torque RAM) chip using 0.2 µm logic process with MgO tunneling barrier cell demo... [more] ICD2007-6
pp.29-34
ICD 2005-05-26
10:30
Hyogo Kobe Univ. A Single-Chip Multi-Processor integrating Quadruple Processors on 90nm CMOS Process
Ken-ichi Kawasaki, Tetsuyoshi Shiota, Yukihito Kawabe, Wataru Shibamoto, Atsushi Sato, Tetsutaro Hashimoto, Motoaki Matsumura, Hiroshi Okano, Fumihiko Hayakawa, Shinichiro Tago, Yasuki Nakamura (Fujitsu Labs.), Hideo Miyake (FLT), Atsuhiro Suga, Hiromasa Takahashi, Atsuki Inoue (Fujitsu Labs.)
We have developed a 51.2-GOPS single-chip multi-processor integrating quadruple processors with 1.0-GB/s system-bus dire... [more] ICD2005-21
pp.7-12
 Results 1 - 5 of 5  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan