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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 8 of 8  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2014-11-26
09:40
Oita B-ConPlaza Implementation of Multi-dimensional FPGA array HPC system-Vocalise for Numerical simulation and its Performance Evaluation
Jiang Li, Hiromasa Kubo, Satoru Yokota, Yuichi Ogishima, Masatoshi Sekine (TUAT) RECONF2014-35
In recent years, the HPC systems with FPGAs increase.
We have proposed the HPC system Vocalise with FPGA array.
The ... [more]
RECONF2014-35
pp.7-12
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2014-11-26
10:45
Oita B-ConPlaza Mobile robot system based on hw/sw Complex System using 3D FPGA-Array System "Vocalise"
Hiromasa Kubo, Jiang Li, Satoru Yokota, Yuichi Ogishima, Masatoshi Sekine (TUAT) RECONF2014-37
Our laboratory has been developing the 3D FPGA-Array HPC system named “Vocalise”(Virtual Object by Configurable Array of... [more] RECONF2014-37
pp.19-24
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2014-11-26
11:10
Oita B-ConPlaza An Image Recognition System Learning Feature Regions with Vocalise
Satoru Yokota, Jiang Li, Hiromasa Kubo, Masatoshi Sekine (TUAT) RECONF2014-38
Recently much attention has been paid to image recognition systems for mobile systems. Mobile systems are used in variou... [more] RECONF2014-38
pp.25-30
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2014-11-27
16:25
Oita B-ConPlaza Voice Recognition System using hw/sw Complex
Yuichi Ogishima, Jiang Li, Satoru Yokota, Hiromasa Kubo, Masatoshi Sekine (TUAT) RECONF2014-43
To assign processor having big load to the FPGA which is LSI being reconfigurable to Hardware and SoftWare complex , the... [more] RECONF2014-43
pp.51-56
IPSJ-SLDM, CPSY, RECONF, VLD [detail] 2014-01-28
16:30
Kanagawa Hiyoshi Campus, Keio University A 3D FPGA-Array "Vocalise" and its communication system.
Yusuke Atsumari, Jiang Li, Hiromasa Kubo, Akihiro Sorimachi, Baku Ogasawara, Masatoshi Sekine (TUAT) VLD2013-115 CPSY2013-86 RECONF2013-69
We have developed a 10cm square card with a three-dimensional I/O that installed a 4 million system gate scale FPGA and ... [more] VLD2013-115 CPSY2013-86 RECONF2013-69
pp.79-84
IPSJ-SLDM, CPSY, RECONF, VLD [detail] 2014-01-28
16:55
Kanagawa Hiyoshi Campus, Keio University An Image Recognition System with Multi-Resolutional Feature Learning on the 3D FPGA-Array "Vocalise"
Baku Ogasawara, Satoru Yokota, Jiang Li, Yusuke Atsumari, Hiromasa Kubo, Masatoshi Sekine (TUAT) VLD2013-116 CPSY2013-87 RECONF2013-70
We propose and develop "an image recognition system" with multi-resolutional feature learning function. The feature lear... [more] VLD2013-116 CPSY2013-87 RECONF2013-70
pp.85-90
RECONF 2013-09-19
13:00
Ishikawa Japan Advanced Institute of Science and Technology The Circuit Configuration method of 3D FPGA-Array System "Vocalise"
Hiromasa Kubo, Jiang Li, Yusuke Atsumari, Baku Ogasawara, Masatoshi Sekine (Tokyo Univ. of Agliculture and Tech.) RECONF2013-32
We have been developing the 3D FPGA-Array HPC system named as“Vocalise(Virtual Object by Configurable Array of Little Sc... [more] RECONF2013-32
pp.73-78
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2012-11-28
13:25
Fukuoka Centennial Hall Kyushu University School of Medicine A 3D FPGA-Array HPC System "Vocalise" and its Performance Evaluation
Yusuke Atsumari, Jiang Li, Hiromasa Kubo, Hakaru Tamukoh, Masatoshi Sekine (TUAT) VLD2012-94 DC2012-60
We have developed a 10cm square card with a three-dimensional I/O that installed a 4 million system gate scale FPGA and ... [more] VLD2012-94 DC2012-60
pp.201-206
 Results 1 - 8 of 8  /   
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