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Committee Date Time Place Paper Title / Authors Abstract Paper #
CAS, NLP 2011-10-20
13:30		 Shizuoka Shizuoka Univ. Fast Circuit Simulation Based on Improved Latency Insertion Method with Predictor-Corrector Method
Hiroki Kurobe, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) CAS2011-39 NLP2011-66		 This report describes an improved latency insertion method (LIM) with predictor-corrector method for the fast transient ... [more] CAS2011-39 NLP2011-66
pp.37-42
EMCJ, IEE-EMC 2011-06-24
14:00		 Kyoto Kyoto Univ. Fast Simulation Technique Based on Block-Latency Insertion Method for Large Linear Circuit with CMOS Inverters
Yusuke Hizawa, Hiroki Kurobe, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) EMCJ2011-40		 For an analysis of large networks including nonlinear active devices and coupled elements, conventional SPICE-like simul... [more] EMCJ2011-40
pp.37-42
MSS, CAS 2010-11-19
10:25		 Osaka Kansai Univ. ADE-LIM for the Fast Transient Simulation of Multiconductor Transmission Lines and Its Estimation
Hiroki Kurobe, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) CAS2010-78 CST2010-51		 This report describes an application techique of the alternating direction explicit-latency insertion mehod (ADE-LIM) to... [more] CAS2010-78 CST2010-51
pp.71-76
CAS, MSS, VLD, SIP 2010-06-21
09:25		 Hokkaido Kitami Institute of Technology High-speed Transient Simulation of Power Distribution Network Based on ADE-LIM
Hiroki Kurobe, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) CAS2010-2 VLD2010-12 SIP2010-23 CST2010-2		 An analysis of power distribution network is emphasized to supply stable power to a printed circuit board and packages i... [more] CAS2010-2 VLD2010-12 SIP2010-23 CST2010-2
pp.7-12
 Results 1 - 4 of 4  /   
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