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Date Time
Place
Paper Title / Authors
Abstract
Paper #
VLD
,
CPSY
,
RECONF
,
IPSJ-SLDM
2007-01-18
11:25
Tokyo
Keio Univ. Hiyoshi Campus
Model Checking of Cycle Accurate Hardware Behavior Models with Instantaneous Communication
Hirohisa Fujita
,
Masahiko Hamada
,
Tadaaki Tanimoto
,
Akio Nakata
,
Teruo Higashino
(
Osaka Univ.
)
Wiring delay imposes a limitation on
increase of clock frequency.
Therefore, instantaneous communications
consuming ...
[more]
VLD2006-98
CPSY2006-69
RECONF2006-69
pp.25-30
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