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Committee Date Time Place Paper Title / Authors Abstract Paper #
MW 2006-09-06
15:10
Tokyo   Boundary Processing of Thin Conductor Plates and Conductor Corners in the FDTD Method Standpoint of Lattice Spacing and Arrangement
Satoru Ikeuti (Panasonic ED Nitto), Yukio Iida, Hiroaki Miula (Kansai Univ.), Toshiaki Nakamura (Panasonic ED Nitto)
In the FDTD method, when the structure with the conductor edges and corners is analyzed, the computation errors by the f... [more] MW2006-100
pp.139-144
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