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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, IPSJ-ARC | 2008-05-14 10:30 |
Tokyo | PSI-SIM: Performance Prediction for Peta-Scale Supercomputers with Thousands of Multi-core Processors Koji Inoue (Kyushu Univ.), Ryutaro Susukita (IST), Hisashige Ando, Shigeru Ishizuki, Hidemi Komatsu (Fujitsu), Yuichi Inadomi, Hiroaki Honda (Kyushu Univ.), Shuji Yamamura (Fujitsu), Hidetomo Shibamura (ISIT), Yunqing Yu, Mutsumi Aoyagi (Kyushu Univ.), Yasunori Kimura (Fujitsu), Kazuaki Murakami (Kyushu Univ.) |
This paper proposes a novel approach to predict the performance of peta-scale supercomputers. It is not easy to accurate... [more] | ICD2008-27 pp.51-56 |
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| CPSY | 2007-10-26 10:20 |
Kumamoto | Kumamoto University | PSI-NSIM: A Parallel Interconnection Network Simulator for Performance Analysis of Large-scale Parallel Systems Hidetomo Shibamura (ISIT), Ryutaro Susukita (Fukuoka IST), Hiroaki Honda, Yuichi Inadomi, Yunqing Yu, Koji Inoue, Mutsumi Aoyagi (Kyushu Univ.)  CPSY2007-32 |
This paper presents an interconnection network simulator, PSI-NSIM, toward designing and performance analysis of large-s... [more] | CPSY2007-32 pp.45-50 |
| RECONF, CPSY, VLD, IPSJ-SLDM | 2006-01-18 13:25 |
Kanagawa | Implementation and Evaluation of Remote Logic Analyzer Go Saitou, Kazuo Nagata, Hideo Harada, Hidetomo Shibamura, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) |
Electronic equipments carrying a reconfigurable FPGA have advantages, the functions of which can be changed，upgraded aft... [more] | VLD2005-102 CPSY2005-58 RECONF2005-91 pp.31-36 |
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| RECONF | 2005-12-02 09:30 |
Fukuoka | Kitakyushu International Conference Center | Development of a Reconfiguration Management Mechanism for Dynamically Reconfigurable System Takanori Susaki, Isao Sakamoto, Hidetomo Shibamura, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) |
We have developed a dynamically reconfigurable system, which uses an embedded processor FPGA. In this system, an embedde... [more] | RECONF2005-72 pp.1-6 |
| RECONF | 2005-12-02 11:50 |
Fukuoka | Kitakyushu International Conference Center | Development of an FPGA Board toward Reconfigurable Cluster Computing Kazuto Hewa, Tomohiro Okajima, Hidetomo Shibamura, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) |
PC cluster has been applied on the fields of Scientific and Engineering Calculations. In this study, we are developing ... [more] |
RECONF2005-76 pp.25-30 |
| RECONF | 2005-09-15 15:00 |
Hiroshima | Development of a partial reconfiguration controller for an embedded processor FPGA Isao Sakamoto, Takanori Susaki, Hidetomo Shibamura, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) |
We develop dynamically reconfigurable system，named EXPRESS-2，using partially reconfigurable FPGA. The FPGA contains one ... [more] | RECONF2005-37 pp.43-48 |
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| RECONF | 2005-09-15 15:45 |
Hiroshima | Feasibility study on a run-time reconfigurable MPEG-2 decoder using functional separation Takeru Kisanuki, Isao Sakamoto, Hidetomo Shibamura, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) |
Recently, the embeding apparatus represented by a cellular phone, PDA, etc. spreads very much, and its performance is al... [more] | RECONF2005-38 pp.49-54 |
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