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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 8 of 8  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD 2017-04-20
15:20
Tokyo   [Invited Talk] Embedded Flash Technology for Automotive Applications
Masaya Nakano, Takashi Ito, Tadaaki Yamauchi, Yasuo Yamaguchi, Takashi Kono, Hideto Hidaka (Renesas Electronics) ICD2017-8
Higher fuel-efficient engine and advanced driver assistance system (ADAS) require the further progress of embedded Flash... [more] ICD2017-8
pp.39-44
ICD 2016-04-15
10:55
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] A 90nm Embedded 1T-MONOS Flash Macro for Automotive Applications with 0.07mJ/8kB Rewrite Energy and Endurance Over 100M Cycles Under Tj of 175°C
Satoru Nakanishi, Hidenori Mitani, Ken Matsubara, Hiroshi Yoshida, Takashi Kono, Yasuhiko Taito, Takashi Ito, Takashi Kurafuji, Kenji Noguchi, Hideto Hidaka, Tadaaki Yamauchi (Renesas) ICD2016-15
A first-ever 90nm embedded 1T-MONOS Flash macro is presented to realize automotive reliability and simple process integr... [more] ICD2016-15
pp.77-81
ICD 2015-04-16
14:25
Nagano   [Invited Talk] A 28nm Embedded SG-MONOS Flash Macro for Automotive Achieving 200MHz Read Operation and 2.0MB/s Write Throughput at Tj of 170℃
Makoto Muneyasu, Yasuhiko Taito, Masaya Nakano, Takashi Ito, Takashi Kono, Kenji Noguchi, Hideto Hidaka, Tadaaki Yamauchi (Renesas) ICD2015-4
First-ever 28nm embedded SG-MONOS flash macros are presented to realize aggressive device scaling with improved reliabil... [more] ICD2015-4
pp.15-19
ICD 2013-04-12
09:20
Ibaraki Advanced Industrial Science and Technology (AIST) [Invited Talk] High Performance and High Reliability 40nm Embedded SG-MONOS Flash Macros for Automotive -- 160MHz Random Access for Code and Endurance Over 10M Cycles for Data --
Tomoya Ogawa, Takashi Kono, Takashi Ito, Tamaki Tsuruda, Takayuki Nishiyama, Tsutomu Nagasawa, Yoshiyuki Kawashima, Hideto Hidaka, Tadaaki Yamauchi (Renesas Electronics) ICD2013-13
The markets of Flash MCUs, microcontrollers with embedded flash memory (eFlash), have been steadily growing since the mi... [more] ICD2013-13
pp.61-66
ICD 2009-04-13
15:40
Miyagi Daikanso (Matsushima, Miyagi) [Panel Discussion] Which memory technology win win the low-VDD race in SoC?
Hideto Hidaka (Renesas Tech.), Masanao Yamaoka (Hitachi, Ltd.), Shinji Miyano (Toshiba Corp.), Satoru Akiyama (Hitachi, Ltd.), Tadahiko Sugibayashi (NEC), Syoichiro Kawashima (Fujitsu Limited), Masataka Osaka (Panasonic) ICD2009-4
A panel discussion session will high-light low-voltage memory trends, limitations, and future prospects by discussing on... [more] ICD2009-4
p.19
ICD 2007-04-12
10:00
Oita   A high-density 1T-4MTJ MRAM with Self-Reference Sensing Scheme
Yasumitsu Murai, Hiroaki Tanizaki (Renesas Design), Takaharu Tsuji, Jun Otani, Yuichiro Yamaguchi, Haruo Furuta, Shuichi Ueno, Tsukasa Oishi, Masanori Hayashikoshi, Hideto Hidaka (Renesas) ICD2007-3
A high-density memory cell named 1-Transistor 4-Magnetic Tunnel Junction (1T-4MTJ) has been proposed for Magnetic Random... [more] ICD2007-3
pp.13-16
ICD 2006-04-13
16:40
Oita Oita University [Panel Discussion] What is your urgent task in R/D of new embedded memories?
Hideto Hidaka (Renesas), Masao Taguchi (SPANSION), Takayuki Kawahara (Hitachi), Daisaburo Takashima (Toshiba), Shuichi Ueno (Renesas), Masashi Takata (Kanazawa Univ.), Masafumi Takahashi (Toshiba)
Recent advent of emerging memory devices circa 2000 has seen discussions directed mainly to stand-alone memory applicati... [more] ICD2006-9
p.49
ICD 2005-04-15
10:30
Fukuoka   A 1.2V 1Mbit Embedded MRAM Core with Folded Bit-Line Array Architecture
Takaharu Tsuji (Renesas Technorogy), Hiroaki Tanizaki (Renesas Device Design), Masatoshi Ishikawa, Jun Otani, Yuichiro Yamaguchi, Shuichi Ueno, Tsukasa Oishi, Hideto Hidaka (Renesas Technorogy)
A 1Mbit MRAM with a 0.81um2 1-Transistor 1-Magnetic Tunnel Junction (1T-1MTJ) cell using 0.13um 4LM logic technology has... [more] ICD2005-13
pp.1-6
 Results 1 - 8 of 8  /   
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